6225     MachineOperand &SrcOp = MI.getOperand(ArgOffset + I);  in packImage16bitOpsToDwords()  local
6226     if (!SrcOp.isReg())  in packImage16bitOpsToDwords()
6229     Register AddrReg = SrcOp.getReg();  in packImage16bitOpsToDwords()
6282     MachineOperand &SrcOp = MI.getOperand(DimIdx + I);  in convertImageAddrToPacked()  local
6283     if (SrcOp.isReg()) {  in convertImageAddrToPacked()
6284       AddrRegs.push_back(SrcOp.getReg());  in convertImageAddrToPacked()
6285       assert(B.getMRI()->getType(SrcOp.getReg()) == S32);  in convertImageAddrToPacked()
6297     MachineOperand &SrcOp = MI.getOperand(DimIdx + I);  in convertImageAddrToPacked()  local
6298     if (SrcOp.isReg())  in convertImageAddrToPacked()
6464       MachineOperand &SrcOp = MI.getOperand(ArgOffset + I);  in legalizeImageIntrinsic()  local
6465       if (!SrcOp.isReg()) {  in legalizeImageIntrinsic()
6466         assert(SrcOp.isImm() && SrcOp.getImm() == 0);  in legalizeImageIntrinsic()
6470       assert(SrcOp.getReg() != AMDGPU::NoRegister);  in legalizeImageIntrinsic()
6473         SrcOp.setReg(PackedRegs[I - Intr->VAddrStart]);  in legalizeImageIntrinsic()
6475         SrcOp.setReg(AMDGPU::NoRegister);  in legalizeImageIntrinsic()