Lines Matching refs:LLT
56 static LLT getPow2VectorType(LLT Ty) { in getPow2VectorType()
63 static LLT getPow2ScalarType(LLT Ty) { in getPow2ScalarType()
66 return LLT::scalar(Pow2Bits); in getPow2ScalarType()
74 const LLT Ty = Query.Types[TypeIdx]; in isSmallOddVector()
78 const LLT EltTy = Ty.getElementType(); in isSmallOddVector()
88 const LLT Ty = Query.Types[TypeIdx]; in sizeIsMultipleOf32()
95 const LLT Ty = Query.Types[TypeIdx]; in isWideVec16()
96 const LLT EltTy = Ty.getScalarType(); in isWideVec16()
103 const LLT Ty = Query.Types[TypeIdx]; in oneMoreElement()
104 const LLT EltTy = Ty.getElementType(); in oneMoreElement()
106 LLT::fixed_vector(Ty.getNumElements() + 1, EltTy)); in oneMoreElement()
112 const LLT Ty = Query.Types[TypeIdx]; in fewerEltsToSize64Vector()
113 const LLT EltTy = Ty.getElementType(); in fewerEltsToSize64Vector()
117 return std::pair(TypeIdx, LLT::scalarOrVector( in fewerEltsToSize64Vector()
126 const LLT Ty = Query.Types[TypeIdx]; in moreEltsToNext32Bit()
128 const LLT EltTy = Ty.getElementType(); in moreEltsToNext32Bit()
136 return std::pair(TypeIdx, LLT::fixed_vector(NewNumElts, EltTy)); in moreEltsToNext32Bit()
143 const LLT Ty = Query.Types[TypeIdx]; in moreElementsToNextExistingRegClass()
158 return std::pair(TypeIdx, LLT::fixed_vector(NewNumElts, EltSize)); in moreElementsToNextExistingRegClass()
162 static LLT getBufferRsrcScalarType(const LLT Ty) { in getBufferRsrcScalarType()
164 return LLT::scalar(128); in getBufferRsrcScalarType()
166 return LLT::vector(NumElems, LLT::scalar(128)); in getBufferRsrcScalarType()
169 static LLT getBufferRsrcRegisterType(const LLT Ty) { in getBufferRsrcRegisterType()
171 return LLT::fixed_vector(4, LLT::scalar(32)); in getBufferRsrcRegisterType()
173 return LLT::fixed_vector(NumElems * 4, LLT::scalar(32)); in getBufferRsrcRegisterType()
176 static LLT getBitcastRegisterType(const LLT Ty) { in getBitcastRegisterType()
182 return LLT::scalar(Size); in getBitcastRegisterType()
185 return LLT::scalarOrVector(ElementCount::getFixed(Size / 32), 32); in getBitcastRegisterType()
190 const LLT Ty = Query.Types[TypeIdx]; in bitcastToRegisterType()
197 const LLT Ty = Query.Types[TypeIdx]; in bitcastToVectorElement32()
201 TypeIdx, LLT::scalarOrVector(ElementCount::getFixed(Size / 32), 32)); in bitcastToVectorElement32()
207 const LLT QueryTy = Query.Types[TypeIdx]; in vectorSmallerThan()
214 const LLT QueryTy = Query.Types[TypeIdx]; in vectorWiderThan()
221 const LLT QueryTy = Query.Types[TypeIdx]; in numElementsNotEven()
230 static bool isRegisterVectorElementType(LLT EltTy) { in isRegisterVectorElementType()
235 static bool isRegisterVectorType(LLT Ty) { in isRegisterVectorType()
243 static bool isRegisterType(LLT Ty) { in isRegisterType()
266 LLT Ty = Query.Types[TypeIdx]; in isIllegalRegisterType()
274 const LLT QueryTy = Query.Types[TypeIdx]; in elementTypeIsLegal()
277 const LLT EltTy = QueryTy.getElementType(); in elementTypeIsLegal()
278 return EltTy == LLT::scalar(16) || EltTy.getSizeInBits() >= 32; in elementTypeIsLegal()
282 static const LLT S1 = LLT::scalar(1);
283 static const LLT S8 = LLT::scalar(8);
284 static const LLT S16 = LLT::scalar(16);
285 static const LLT S32 = LLT::scalar(32);
286 static const LLT F32 = LLT::float32();
287 static const LLT S64 = LLT::scalar(64);
288 static const LLT F64 = LLT::float64();
289 static const LLT S96 = LLT::scalar(96);
290 static const LLT S128 = LLT::scalar(128);
291 static const LLT S160 = LLT::scalar(160);
292 static const LLT S224 = LLT::scalar(224);
293 static const LLT S256 = LLT::scalar(256);
294 static const LLT S512 = LLT::scalar(512);
295 static const LLT MaxScalar = LLT::scalar(MaxRegisterSize);
297 static const LLT V2S8 = LLT::fixed_vector(2, 8);
298 static const LLT V2S16 = LLT::fixed_vector(2, 16);
299 static const LLT V4S16 = LLT::fixed_vector(4, 16);
300 static const LLT V6S16 = LLT::fixed_vector(6, 16);
301 static const LLT V8S16 = LLT::fixed_vector(8, 16);
302 static const LLT V10S16 = LLT::fixed_vector(10, 16);
303 static const LLT V12S16 = LLT::fixed_vector(12, 16);
304 static const LLT V16S16 = LLT::fixed_vector(16, 16);
306 static const LLT V2F16 = LLT::fixed_vector(2, LLT::float16());
307 static const LLT V2BF16 = V2F16; // FIXME
309 static const LLT V2S32 = LLT::fixed_vector(2, 32);
310 static const LLT V3S32 = LLT::fixed_vector(3, 32);
311 static const LLT V4S32 = LLT::fixed_vector(4, 32);
312 static const LLT V5S32 = LLT::fixed_vector(5, 32);
313 static const LLT V6S32 = LLT::fixed_vector(6, 32);
314 static const LLT V7S32 = LLT::fixed_vector(7, 32);
315 static const LLT V8S32 = LLT::fixed_vector(8, 32);
316 static const LLT V9S32 = LLT::fixed_vector(9, 32);
317 static const LLT V10S32 = LLT::fixed_vector(10, 32);
318 static const LLT V11S32 = LLT::fixed_vector(11, 32);
319 static const LLT V12S32 = LLT::fixed_vector(12, 32);
320 static const LLT V16S32 = LLT::fixed_vector(16, 32);
321 static const LLT V32S32 = LLT::fixed_vector(32, 32);
323 static const LLT V2S64 = LLT::fixed_vector(2, 64);
324 static const LLT V3S64 = LLT::fixed_vector(3, 64);
325 static const LLT V4S64 = LLT::fixed_vector(4, 64);
326 static const LLT V5S64 = LLT::fixed_vector(5, 64);
327 static const LLT V6S64 = LLT::fixed_vector(6, 64);
328 static const LLT V7S64 = LLT::fixed_vector(7, 64);
329 static const LLT V8S64 = LLT::fixed_vector(8, 64);
330 static const LLT V16S64 = LLT::fixed_vector(16, 64);
332 static const LLT V2S128 = LLT::fixed_vector(2, 128);
333 static const LLT V4S128 = LLT::fixed_vector(4, 128);
335 static std::initializer_list<LLT> AllScalarTypes = {S32, S64, S96, S128,
338 static std::initializer_list<LLT> AllS16Vectors{
341 static std::initializer_list<LLT> AllS32Vectors = {
345 static std::initializer_list<LLT> AllS64Vectors = {V2S64, V3S64, V4S64, V5S64,
349 static bool isRegisterClassType(LLT Ty) { in isRegisterClassType()
351 Ty = Ty.changeElementType(LLT::scalar(Ty.getScalarSizeInBits())); in isRegisterClassType()
367 const LLT Ty = Query.Types[TypeIdx]; in isWideScalarExtLoadTruncStore()
405 const LLT Ty = Query.Types[0]; in isLoadStoreSizeLegal()
476 static bool hasBufferRsrcWorkaround(const LLT Ty) { in hasBufferRsrcWorkaround()
480 const LLT ElemTy = Ty.getElementType(); in hasBufferRsrcWorkaround()
490 static bool loadStoreBitcastWorkaround(const LLT Ty) { in loadStoreBitcastWorkaround()
511 const LLT Ty = Query.Types[0]; in isLoadStoreLegal()
518 static bool shouldBitcastLoadStoreType(const GCNSubtarget &ST, const LLT Ty, in shouldBitcastLoadStoreType()
519 const LLT MemTy) { in shouldBitcastLoadStoreType()
537 static bool shouldWidenLoad(const GCNSubtarget &ST, LLT MemoryTy, in shouldWidenLoad()
584 static LLT castBufferRsrcFromV4I32(MachineInstr &MI, MachineIRBuilder &B, in castBufferRsrcFromV4I32()
588 const LLT PointerTy = MRI.getType(MO.getReg()); in castBufferRsrcFromV4I32()
594 const LLT ScalarTy = getBufferRsrcScalarType(PointerTy); in castBufferRsrcFromV4I32()
595 const LLT VectorTy = getBufferRsrcRegisterType(PointerTy); in castBufferRsrcFromV4I32()
599 const LLT S32 = LLT::scalar(32); in castBufferRsrcFromV4I32()
627 const LLT PointerTy = MRI.getType(Pointer); in castBufferRsrcToV4I32()
628 const LLT ScalarTy = getBufferRsrcScalarType(PointerTy); in castBufferRsrcToV4I32()
629 const LLT VectorTy = getBufferRsrcRegisterType(PointerTy); in castBufferRsrcToV4I32()
635 auto Unmerged = B.buildUnmerge(LLT::scalar(32), Pointer); in castBufferRsrcToV4I32()
648 const LLT PointerTy = B.getMRI()->getType(MO.getReg()); in castBufferRsrcArgToV4I32()
661 return LLT::pointer(AS, TM.getPointerSizeInBits(AS)); in AMDGPULegalizerInfo()
664 const LLT GlobalPtr = GetAddrSpacePtr(AMDGPUAS::GLOBAL_ADDRESS); in AMDGPULegalizerInfo()
665 const LLT ConstantPtr = GetAddrSpacePtr(AMDGPUAS::CONSTANT_ADDRESS); in AMDGPULegalizerInfo()
666 const LLT Constant32Ptr = GetAddrSpacePtr(AMDGPUAS::CONSTANT_ADDRESS_32BIT); in AMDGPULegalizerInfo()
667 const LLT LocalPtr = GetAddrSpacePtr(AMDGPUAS::LOCAL_ADDRESS); in AMDGPULegalizerInfo()
668 const LLT RegionPtr = GetAddrSpacePtr(AMDGPUAS::REGION_ADDRESS); in AMDGPULegalizerInfo()
669 const LLT FlatPtr = GetAddrSpacePtr(AMDGPUAS::FLAT_ADDRESS); in AMDGPULegalizerInfo()
670 const LLT PrivatePtr = GetAddrSpacePtr(AMDGPUAS::PRIVATE_ADDRESS); in AMDGPULegalizerInfo()
671 const LLT BufferFatPtr = GetAddrSpacePtr(AMDGPUAS::BUFFER_FAT_POINTER); in AMDGPULegalizerInfo()
672 const LLT RsrcPtr = GetAddrSpacePtr(AMDGPUAS::BUFFER_RESOURCE); in AMDGPULegalizerInfo()
673 const LLT BufferStridedPtr = in AMDGPULegalizerInfo()
676 const LLT CodePtr = FlatPtr; in AMDGPULegalizerInfo()
678 const std::initializer_list<LLT> AddrSpaces64 = { in AMDGPULegalizerInfo()
682 const std::initializer_list<LLT> AddrSpaces32 = { in AMDGPULegalizerInfo()
686 const std::initializer_list<LLT> AddrSpaces128 = {RsrcPtr}; in AMDGPULegalizerInfo()
688 const std::initializer_list<LLT> FPTypesBase = { in AMDGPULegalizerInfo()
692 const std::initializer_list<LLT> FPTypes16 = { in AMDGPULegalizerInfo()
696 const std::initializer_list<LLT> FPTypesPK16 = { in AMDGPULegalizerInfo()
700 const LLT MinScalarFPTy = ST.has16BitInsts() ? S16 : S32; in AMDGPULegalizerInfo()
1359 1, LLT::scalar(Query.Types[0].getSizeInBits())); in AMDGPULegalizerInfo()
1362 return std::pair(1, LLT::scalar(Query.Types[0].getSizeInBits())); in AMDGPULegalizerInfo()
1375 0, LLT::scalar(Query.Types[1].getSizeInBits())); in AMDGPULegalizerInfo()
1378 return std::pair(0, LLT::scalar(Query.Types[1].getSizeInBits())); in AMDGPULegalizerInfo()
1387 const LLT DstTy = Query.Types[0]; in AMDGPULegalizerInfo()
1395 const LLT PtrTy = Query.Types[1]; in AMDGPULegalizerInfo()
1509 [=](const LegalityQuery &Query) -> std::pair<unsigned, LLT> { in AMDGPULegalizerInfo()
1510 const LLT DstTy = Query.Types[0]; in AMDGPULegalizerInfo()
1511 const LLT PtrTy = Query.Types[1]; in AMDGPULegalizerInfo()
1518 return std::pair(0, LLT::scalar(MemSize)); in AMDGPULegalizerInfo()
1524 return std::pair(0, LLT::scalar(MaxSize)); in AMDGPULegalizerInfo()
1527 return std::pair(0, LLT::scalar(Align)); in AMDGPULegalizerInfo()
1534 [=](const LegalityQuery &Query) -> std::pair<unsigned, LLT> { in AMDGPULegalizerInfo()
1535 const LLT DstTy = Query.Types[0]; in AMDGPULegalizerInfo()
1536 const LLT PtrTy = Query.Types[1]; in AMDGPULegalizerInfo()
1538 LLT EltTy = DstTy.getElementType(); in AMDGPULegalizerInfo()
1555 0, LLT::scalarOrVector( in AMDGPULegalizerInfo()
1568 LLT::fixed_vector(NumElts / NumPieces, EltTy)); in AMDGPULegalizerInfo()
1583 0, LLT::scalarOrVector( in AMDGPULegalizerInfo()
1702 LLT::fixed_vector(2, LocalPtr), in AMDGPULegalizerInfo()
1703 LLT::fixed_vector(2, PrivatePtr)}, in AMDGPULegalizerInfo()
1732 const LLT ValTy = Query.Types[0]; in AMDGPULegalizerInfo()
1733 const LLT AmountTy = Query.Types[1]; in AMDGPULegalizerInfo()
1768 const LLT EltTy = Query.Types[EltTypeIdx]; in AMDGPULegalizerInfo()
1769 const LLT VecTy = Query.Types[VecTypeIdx]; in AMDGPULegalizerInfo()
1770 const LLT IdxTy = Query.Types[IdxTypeIdx]; in AMDGPULegalizerInfo()
1797 const LLT EltTy = Query.Types[EltTypeIdx]; in AMDGPULegalizerInfo()
1798 const LLT VecTy = Query.Types[VecTypeIdx]; in AMDGPULegalizerInfo()
1805 LLT::fixed_vector(VecSize / TargetEltSize, TargetEltSize)); in AMDGPULegalizerInfo()
1822 const LLT &EltTy = Query.Types[1].getElementType(); in AMDGPULegalizerInfo()
1837 const LLT BigTy = Query.Types[BigTyIdx]; in AMDGPULegalizerInfo()
1842 const LLT BigTy = Query.Types[BigTyIdx]; in AMDGPULegalizerInfo()
1843 const LLT LitTy = Query.Types[LitTyIdx]; in AMDGPULegalizerInfo()
1849 const LLT BigTy = Query.Types[BigTyIdx]; in AMDGPULegalizerInfo()
1855 const LLT LitTy = Query.Types[LitTyIdx]; in AMDGPULegalizerInfo()
1909 const LLT Ty = Query.Types[TypeIdx]; in AMDGPULegalizerInfo()
1911 const LLT &EltTy = Ty.getElementType(); in AMDGPULegalizerInfo()
1924 const LLT BigTy = Query.Types[BigTyIdx]; in AMDGPULegalizerInfo()
1953 const LLT Ty = Query.Types[LitTyIdx]; in AMDGPULegalizerInfo()
1961 const LLT Ty = Query.Types[BigTyIdx]; in AMDGPULegalizerInfo()
1967 const LLT &Ty = Query.Types[BigTyIdx]; in AMDGPULegalizerInfo()
1974 return std::pair(BigTyIdx, LLT::scalar(NewSizeInBits)); in AMDGPULegalizerInfo()
2197 const LLT S32 = LLT::scalar(32); in getSegmentAperture()
2198 const LLT S64 = LLT::scalar(64); in getSegmentAperture()
2225 LLT::pointer(AMDGPUAS::CONSTANT_ADDRESS, 64)); in getSegmentAperture()
2237 LLT::pointer(AMDGPUAS::CONSTANT_ADDRESS, 64)); in getSegmentAperture()
2247 LLT::scalar(32), commonAlignment(Align(64), Offset)); in getSegmentAperture()
2251 B.buildConstant(LLT::scalar(64), Offset).getReg(0)); in getSegmentAperture()
2257 LLT::pointer(AMDGPUAS::CONSTANT_ADDRESS, 64)); in getSegmentAperture()
2270 LLT::scalar(32), commonAlignment(Align(64), StructOffset)); in getSegmentAperture()
2273 B.buildConstant(LLT::scalar(64), StructOffset).getReg(0)); in getSegmentAperture()
2309 const LLT S32 = LLT::scalar(32); in legalizeAddrSpaceCast()
2313 LLT DstTy = MRI.getType(Dst); in legalizeAddrSpaceCast()
2314 LLT SrcTy = MRI.getType(Src); in legalizeAddrSpaceCast()
2351 B.buildICmp(CmpInst::ICMP_NE, LLT::scalar(1), Src, FlatNull.getReg(0)); in legalizeAddrSpaceCast()
2383 auto CmpRes = B.buildICmp(CmpInst::ICMP_NE, LLT::scalar(1), Src, in legalizeAddrSpaceCast()
2425 LLT Ty = MRI.getType(Src); in legalizeFroundeven()
2441 auto Cond = B.buildFCmp(CmpInst::FCMP_OGT, LLT::scalar(1), Fabs, C2); in legalizeFroundeven()
2451 const LLT S1 = LLT::scalar(1); in legalizeFceil()
2452 const LLT S64 = LLT::scalar(64); in legalizeFceil()
2483 LLT Ty = MRI.getType(DstReg); in legalizeFrem()
2497 LLT S32 = LLT::scalar(32); in extractF64Exponent()
2513 const LLT S1 = LLT::scalar(1); in legalizeIntrinsicTrunc()
2514 const LLT S32 = LLT::scalar(32); in legalizeIntrinsicTrunc()
2515 const LLT S64 = LLT::scalar(64); in legalizeIntrinsicTrunc()
2562 const LLT S64 = LLT::scalar(64); in legalizeITOFP()
2563 const LLT S32 = LLT::scalar(32); in legalizeITOFP()
2620 const LLT S64 = LLT::scalar(64); in legalizeFPTOI()
2621 const LLT S32 = LLT::scalar(32); in legalizeFPTOI()
2623 const LLT SrcLT = MRI.getType(Src); in legalizeFPTOI()
2711 LLT VecTy = MRI.getType(Vec); in legalizeExtractVectorElt()
2712 LLT EltTy = VecTy.getElementType(); in legalizeExtractVectorElt()
2721 LLT IntTy = LLT::scalar(EltTy.getSizeInBits()); in legalizeExtractVectorElt()
2722 LLT IntVecTy = VecTy.changeElementType(IntTy); in legalizeExtractVectorElt()
2763 LLT VecTy = MRI.getType(Vec); in legalizeInsertVectorElt()
2764 LLT EltTy = VecTy.getElementType(); in legalizeInsertVectorElt()
2774 LLT IntTy = LLT::scalar(EltTy.getSizeInBits()); in legalizeInsertVectorElt()
2775 LLT IntVecTy = VecTy.changeElementType(IntTy); in legalizeInsertVectorElt()
2819 LLT Ty = MRI.getType(DstReg); in legalizeSinCos()
2842 bool AMDGPULegalizerInfo::buildPCRelGlobalAddress(Register DstReg, LLT PtrTy, in buildPCRelGlobalAddress()
2872 LLT ConstPtrTy = LLT::pointer(AMDGPUAS::CONSTANT_ADDRESS, 64); in buildPCRelGlobalAddress()
2896 Register DstReg, LLT PtrTy, MachineIRBuilder &B, const GlobalValue *GV, in buildAbsGlobalAddress()
2900 LLT S32 = LLT::scalar(32); in buildAbsGlobalAddress()
2932 : MRI.createGenericVirtualRegister(LLT::scalar(64)); in buildAbsGlobalAddress()
2954 LLT Ty = MRI.getType(DstReg); in legalizeGlobalValue()
3000 LLT S32 = LLT::scalar(32); in legalizeGlobalValue()
3034 LLT PtrTy = LLT::pointer(AMDGPUAS::CONSTANT_ADDRESS, 64); in legalizeGlobalValue()
3037 LLT LoadTy = Ty.getSizeInBits() == 32 ? PtrTy : Ty; in legalizeGlobalValue()
3057 static LLT widenToNextPowerOf2(LLT Ty) { in widenToNextPowerOf2()
3061 return LLT::scalar(PowerOf2Ceil(Ty.getSizeInBits())); in widenToNextPowerOf2()
3071 LLT PtrTy = MRI.getType(PtrReg); in legalizeLoad()
3075 LLT ConstPtr = LLT::pointer(AMDGPUAS::CONSTANT_ADDRESS, 64); in legalizeLoad()
3087 LLT ValTy = MRI.getType(ValReg); in legalizeLoad()
3098 const LLT MemTy = MMO->getMemoryType(); in legalizeLoad()
3124 LLT WideTy = widenToNextPowerOf2(ValTy); in legalizeLoad()
3160 LLT DataTy = MRI.getType(DataReg); in legalizeStore()
3174 LLT Ty = MRI.getType(MI.getOperand(0).getReg()); in legalizeFMad()
3182 if (Ty == LLT::float32() && in legalizeFMad()
3185 if (Ty == LLT::float16() && in legalizeFMad()
3205 LLT ValTy = MRI.getType(CmpVal); in legalizeAtomicCmpXChg()
3206 LLT VecTy = LLT::fixed_vector(2, ValTy); in legalizeAtomicCmpXChg()
3241 return MRI.getType(DefMI->getOperand(1).getReg()) == LLT::scalar(16); in valueIsKnownNeverF32Denorm()
3270 const LLT F32 = LLT::scalar(32); in getScaledLogInput()
3274 B.buildFCmp(CmpInst::FCMP_OLT, LLT::scalar(1), Src, SmallestNormal); in getScaledLogInput()
3295 LLT Ty = B.getMRI()->getType(Dst); in legalizeFlog2()
3298 if (Ty == LLT::scalar(16)) { in legalizeFlog2()
3299 const LLT F32 = LLT::scalar(32); in legalizeFlog2()
3310 assert(Ty == LLT::scalar(32)); in legalizeFlog2()
3335 static Register getMad(MachineIRBuilder &B, LLT Ty, Register X, Register Y, in getMad()
3350 const LLT Ty = MRI.getType(X); in legalizeFlogCommon()
3353 const LLT F32 = LLT::scalar(32); in legalizeFlogCommon()
3354 const LLT F16 = LLT::scalar(16); in legalizeFlogCommon()
3431 B.buildFCmp(CmpInst::FCMP_OLT, LLT::scalar(1), Fabs, Inf, Flags); in legalizeFlogCommon()
3455 LLT Ty = B.getMRI()->getType(Dst); in legalizeFlogUnsafe()
3457 if (Ty == LLT::scalar(32)) { in legalizeFlogUnsafe()
3480 auto Log2Operand = Ty == LLT::scalar(16) in legalizeFlogUnsafe()
3498 LLT Ty = B.getMRI()->getType(Dst); in legalizeFExp2()
3499 const LLT F16 = LLT::scalar(16); in legalizeFExp2()
3500 const LLT F32 = LLT::scalar(32); in legalizeFExp2()
3528 auto NeedsScaling = B.buildFCmp(CmpInst::FCMP_OLT, LLT::scalar(1), Src, in legalizeFExp2()
3550 LLT Ty = B.getMRI()->getType(Dst); in legalizeFExpUnsafe()
3551 LLT F32 = LLT::scalar(32); in legalizeFExpUnsafe()
3570 B.buildFCmp(CmpInst::FCMP_OLT, LLT::scalar(1), X, Threshold, Flags); in legalizeFExpUnsafe()
3595 LLT Ty = MRI.getType(Dst); in legalizeFExp()
3596 const LLT F16 = LLT::scalar(16); in legalizeFExp()
3597 const LLT F32 = LLT::scalar(32); in legalizeFExp()
3698 auto IntE = B.buildFPTOSI(LLT::scalar(32), E); in legalizeFExp()
3709 B.buildFCmp(CmpInst::FCMP_OLT, LLT::scalar(1), X, UnderflowCheckConst); in legalizeFExp()
3720 B.buildFCmp(CmpInst::FCMP_OGT, LLT::scalar(1), X, OverflowCheckConst); in legalizeFExp()
3736 LLT Ty = B.getMRI()->getType(Dst); in legalizeFPow()
3737 const LLT F16 = LLT::float16(); in legalizeFPow()
3738 const LLT F32 = LLT::float32(); in legalizeFPow()
3780 const LLT S1 = LLT::scalar(1); in legalizeFFloor()
3781 const LLT F64 = LLT::float64(); in legalizeFFloor()
3838 const LLT S32 = LLT::scalar(32); in legalizeBuildVector()
3839 const LLT S16 = LLT::scalar(16); in legalizeBuildVector()
3840 assert(MRI.getType(Dst) == LLT::fixed_vector(2, 16)); in legalizeBuildVector()
3880 const LLT S1 = LLT::scalar(1); in buildMultiply()
3881 const LLT S32 = LLT::scalar(32); in buildMultiply()
3882 const LLT S64 = LLT::scalar(64); in buildMultiply()
4132 LLT Ty = MRI.getType(DstReg); in legalizeMul()
4150 LLT S32 = LLT::scalar(32); in legalizeMul()
4176 LLT DstTy = MRI.getType(Dst); in legalizeCTLZ_CTTZ()
4177 LLT SrcTy = MRI.getType(Src); in legalizeCTLZ_CTTZ()
4194 LLT SrcTy = MRI.getType(Src); in legalizeCTLZ_ZERO_UNDEF()
4262 LLT ArgTy) const { in loadInputValue()
4271 const LLT S32 = LLT::scalar(32); in loadInputValue()
4298 LLT ArgTy; in loadInputValue()
4317 ArgTy = LLT::scalar(32); in loadInputValue()
4322 ArgTy = LLT::scalar(32); in loadInputValue()
4327 ArgTy = LLT::scalar(32); in loadInputValue()
4383 LLT ArgTy; in legalizeWorkitemIDIntrinsic()
4403 Register TmpReg = MRI.createGenericVirtualRegister(LLT::scalar(32)); in legalizeWorkitemIDIntrinsic()
4415 LLT PtrTy = LLT::pointer(AMDGPUAS::CONSTANT_ADDRESS, 64); in getKernargParameterPtr()
4424 auto COffset = B.buildConstant(LLT::scalar(64), Offset); in getKernargParameterPtr()
4437 assert(B.getMRI()->getType(DstReg) == LLT::scalar(32) && in legalizeKernargMemParameter()
4453 LLT DstTy = MRI.getType(Dst); in legalizeFDIV()
4454 LLT S16 = LLT::scalar(16); in legalizeFDIV()
4455 LLT S32 = LLT::scalar(32); in legalizeFDIV()
4456 LLT S64 = LLT::scalar(64); in legalizeFDIV()
4473 const LLT S1 = LLT::scalar(1); in legalizeUnsignedDIV_REM32Impl()
4474 const LLT S32 = LLT::scalar(32); in legalizeUnsignedDIV_REM32Impl()
4526 const LLT S32 = LLT::scalar(32); in emitReciprocalU64()
4561 const LLT S32 = LLT::scalar(32); in legalizeUnsignedDIV_REM64Impl()
4562 const LLT S64 = LLT::scalar(64); in legalizeUnsignedDIV_REM64Impl()
4563 const LLT S1 = LLT::scalar(1); in legalizeUnsignedDIV_REM64Impl()
4690 const LLT S64 = LLT::scalar(64); in legalizeUnsignedDIV_REM()
4691 const LLT S32 = LLT::scalar(32); in legalizeUnsignedDIV_REM()
4695 LLT Ty = MRI.getType(MI.getOperand(0).getReg()); in legalizeUnsignedDIV_REM()
4711 const LLT S64 = LLT::scalar(64); in legalizeSignedDIV_REM()
4712 const LLT S32 = LLT::scalar(32); in legalizeSignedDIV_REM()
4714 LLT Ty = MRI.getType(MI.getOperand(0).getReg()); in legalizeSignedDIV_REM()
4783 LLT ResTy = MRI.getType(Res); in legalizeFastUnsafeFDIV()
4790 if (!AllowInaccurateRcp && ResTy != LLT::scalar(16)) in legalizeFastUnsafeFDIV()
4824 if (!AllowInaccurateRcp && (ResTy != LLT::scalar(16) || in legalizeFastUnsafeFDIV()
4845 LLT ResTy = MRI.getType(Res); in legalizeFastUnsafeFDIV64()
4887 LLT S16 = LLT::scalar(16); in legalizeFDIV16()
4888 LLT S32 = LLT::scalar(32); in legalizeFDIV16()
4951 LLT S32 = LLT::scalar(32); in legalizeFDIV32()
4952 LLT S1 = LLT::scalar(1); in legalizeFDIV32()
5036 LLT S64 = LLT::scalar(64); in legalizeFDIV64()
5037 LLT S1 = LLT::scalar(1); in legalizeFDIV64()
5072 LLT S32 = LLT::scalar(32); in legalizeFDIV64()
5113 LLT Ty = MRI.getType(Res0); in legalizeFFREXP()
5114 LLT InstrExpTy = Ty == LLT::scalar(16) ? LLT::scalar(16) : LLT::scalar(32); in legalizeFFREXP()
5127 B.buildFCmp(CmpInst::FCMP_OLT, LLT::scalar(1), Fabs, Inf, Flags); in legalizeFFREXP()
5148 LLT S32 = LLT::scalar(32); in legalizeFDIVFastIntrin()
5149 LLT S1 = LLT::scalar(1); in legalizeFDIVFastIntrin()
5182 const LLT F32 = LLT::scalar(32); in legalizeFSQRTF16()
5199 const LLT S1 = LLT::scalar(1); in legalizeFSQRTF32()
5200 const LLT F32 = LLT::scalar(32); in legalizeFSQRTF32()
5201 const LLT I32 = LLT::scalar(32); in legalizeFSQRTF32()
5266 auto IsZeroOrInf = B.buildIsFPClass(LLT::scalar(1), SqrtX, fcZero | fcPosInf); in legalizeFSQRTF32()
5296 const LLT S1 = LLT::scalar(1); in legalizeFSQRTF64()
5297 const LLT S32 = LLT::scalar(32); in legalizeFSQRTF64()
5298 const LLT F64 = LLT::scalar(64); in legalizeFSQRTF64()
5348 auto IsZeroOrInf = B.buildIsFPClass(LLT::scalar(1), SqrtX, fcZero | fcPosInf); in legalizeFSQRTF64()
5360 LLT Ty = MRI.getType(MI.getOperand(0).getReg()); in legalizeFSQRT()
5361 if (Ty == LLT::scalar(32)) in legalizeFSQRT()
5363 if (Ty == LLT::scalar(64)) in legalizeFSQRT()
5365 if (Ty == LLT::scalar(16)) in legalizeFSQRT()
5386 LLT Ty = MRI.getType(Dst); in legalizeRsqClampIntrinsic()
5389 if (Ty == LLT::scalar(32)) in legalizeRsqClampIntrinsic()
5391 else if (Ty == LLT::scalar(64)) in legalizeRsqClampIntrinsic()
5431 Register Src2, LLT VT) -> Register { in legalizeLaneOp()
5469 LLT Ty = MRI.getType(DstReg); in legalizeLaneOp()
5481 Src1 = B.buildAnyExt(LLT::scalar(32), Src1).getReg(0); in legalizeLaneOp()
5484 Src2 = B.buildAnyExt(LLT::scalar(32), Src2).getReg(0); in legalizeLaneOp()
5495 LLT PartialResTy = S32; in legalizeLaneOp()
5497 LLT EltTy = Ty.getElementType(); in legalizeLaneOp()
5545 LLT DstTy = MRI.getType(DstReg); in getImplicitArgPtr()
5546 LLT IdxTy = LLT::scalar(DstTy.getSizeInBits()); in getImplicitArgPtr()
5570 LLT S32 = LLT::scalar(32); in legalizePointerAsRsrcIntrin()
5653 auto Unmerge = B.buildUnmerge(LLT::scalar(32), MI.getOperand(2).getReg()); in legalizeIsAddrSpace()
5673 const LLT S32 = LLT::scalar(32); in splitBufferOffsets()
5718 const LLT S16 = LLT::scalar(16); in handleD16VData()
5719 const LLT S32 = LLT::scalar(32); in handleD16VData()
5720 LLT StoreVT = MRI.getType(Reg); in handleD16VData()
5732 return B.buildBuildVector(LLT::fixed_vector(NumElts, S32), WideRegs) in handleD16VData()
5742 return B.buildBuildVector(LLT::fixed_vector(2, S32), PackedRegs) in handleD16VData()
5752 Reg = B.buildBuildVector(LLT::fixed_vector(6, S16), PackedRegs).getReg(0); in handleD16VData()
5753 return B.buildBitcast(LLT::fixed_vector(3, S32), Reg).getReg(0); in handleD16VData()
5758 Reg = B.buildBitcast(LLT::fixed_vector(2, S32), Reg).getReg(0); in handleD16VData()
5763 return B.buildBuildVector(LLT::fixed_vector(4, S32), PackedRegs) in handleD16VData()
5770 if (StoreVT == LLT::fixed_vector(3, S16)) { in handleD16VData()
5771 Reg = B.buildPadVectorWithUndefElements(LLT::fixed_vector(4, S16), Reg) in handleD16VData()
5780 LLT Ty = MRI->getType(VData); in fixStoreSourceType()
5782 const LLT S16 = LLT::scalar(16); in fixStoreSourceType()
5789 if (Ty == LLT::scalar(8) || Ty == S16) { in fixStoreSourceType()
5790 Register AnyExt = B.buildAnyExt(LLT::scalar(32), VData).getReg(0); in fixStoreSourceType()
5810 LLT Ty = MRI.getType(VData); in legalizeBufferStore()
5811 LLT EltTy = Ty.getScalarType(); in legalizeBufferStore()
5813 const LLT S32 = LLT::scalar(32); in legalizeBufferStore()
5919 const LLT MemTy = MMO->getMemoryType(); in legalizeBufferLoad()
5920 const LLT S32 = LLT::scalar(32); in legalizeBufferLoad()
5961 LLT Ty = MRI.getType(Dst); in legalizeBufferLoad()
5968 LLT EltTy = Ty.getScalarType(); in legalizeBufferLoad()
6011 LLT LoadTy = LLT::fixed_vector(NumLoadDWords, S32); in legalizeBufferLoad()
6038 LLT UnpackedTy = Ty.changeElementSize(32); in legalizeBufferLoad()
6181 VIndex = B.buildConstant(LLT::scalar(32), 0).getReg(0); in legalizeBufferAtomic()
6220 const LLT S16 = LLT::scalar(16); in packImage16bitOpsToDwords()
6221 const LLT V2S16 = LLT::fixed_vector(2, 16); in packImage16bitOpsToDwords()
6278 const LLT S32 = LLT::scalar(32); in convertImageAddrToPacked()
6292 B.buildBuildVector(LLT::fixed_vector(NumAddrRegs, 32), AddrRegs); in convertImageAddrToPacked()
6332 const LLT S32 = LLT::scalar(32); in legalizeImageIntrinsic()
6333 const LLT S16 = LLT::scalar(16); in legalizeImageIntrinsic()
6334 const LLT V2S16 = LLT::fixed_vector(2, 16); in legalizeImageIntrinsic()
6338 LLT Ty; in legalizeImageIntrinsic()
6350 LLT GradTy = in legalizeImageIntrinsic()
6352 LLT AddrTy = in legalizeImageIntrinsic()
6400 LLT Ty = MRI->getType(VData0); in legalizeImageIntrinsic()
6409 LLT PackedTy = LLT::fixed_vector(2, Ty); in legalizeImageIntrinsic()
6449 LLT PackedAddrTy = in legalizeImageIntrinsic()
6450 LLT::fixed_vector(2 * (PackedRegs.size() - NSAMaxSize + 1), 16); in legalizeImageIntrinsic()
6456 LLT PackedAddrTy = LLT::fixed_vector(2 * PackedRegs.size(), 16); in legalizeImageIntrinsic()
6529 const LLT EltTy = Ty.getScalarType(); in legalizeImageIntrinsic()
6547 const LLT AdjustedTy = in legalizeImageIntrinsic()
6555 LLT RoundedTy; in legalizeImageIntrinsic()
6558 LLT TFETy; in legalizeImageIntrinsic()
6561 LLT RegTy; in legalizeImageIntrinsic()
6565 LLT::scalarOrVector(ElementCount::getFixed(AdjustedNumElts), 32); in legalizeImageIntrinsic()
6566 TFETy = LLT::fixed_vector(AdjustedNumElts + 1, 32); in legalizeImageIntrinsic()
6572 RoundedTy = LLT::scalarOrVector( in legalizeImageIntrinsic()
6574 TFETy = LLT::fixed_vector(RoundedSize / 32 + 1, S32); in legalizeImageIntrinsic()
6590 const LLT LoadResultTy = IsTFE ? TFETy : RoundedTy; in legalizeImageIntrinsic()
6668 auto padWithUndef = [&](LLT Ty, int NumElts) { in legalizeImageIntrinsic()
6677 LLT ResTy = MRI->getType(ResultRegs[0]); in legalizeImageIntrinsic()
6688 const LLT V3S16 = LLT::fixed_vector(3, 16); in legalizeImageIntrinsic()
6694 LLT V4S16 = LLT::fixed_vector(4, 16); in legalizeImageIntrinsic()
6722 LLT Ty = B.getMRI()->getType(OrigDst); in legalizeSBufferLoad()
6732 Dst = B.getMRI()->createGenericVirtualRegister(LLT::scalar(32)); in legalizeSBufferLoad()
6745 if (shouldBitcastLoadStoreType(ST, Ty, LLT::scalar(Size))) { in legalizeSBufferLoad()
6831 const LLT S64 = LLT::scalar(64); in legalizeTrapHsaQueuePtr()
6843 LLT::pointer(AMDGPUAS::CONSTANT_ADDRESS, 64)); in legalizeTrapHsaQueuePtr()
6855 LLT::scalar(64), commonAlignment(Align(64), Offset)); in legalizeTrapHsaQueuePtr()
6859 LLT::pointer(AMDGPUAS::CONSTANT_ADDRESS, 64)); in legalizeTrapHsaQueuePtr()
6861 B.buildConstant(LLT::scalar(64), Offset).getReg(0)); in legalizeTrapHsaQueuePtr()
6875 MRI.createGenericVirtualRegister(LLT::pointer(AMDGPUAS::CONSTANT_ADDRESS, 64)); in legalizeTrapHsaQueuePtr()
6931 const LLT S16 = LLT::scalar(16); in legalizeBVHIntrinsic()
6932 const LLT S32 = LLT::scalar(32); in legalizeBVHIntrinsic()
6933 const LLT V2S16 = LLT::fixed_vector(2, 16); in legalizeBVHIntrinsic()
6934 const LLT V3S32 = LLT::fixed_vector(3, 32); in legalizeBVHIntrinsic()
7059 LLT OpTy = LLT::fixed_vector(Ops.size(), 32); in legalizeBVHIntrinsic()
7117 LLT S32 = LLT::scalar(32); in legalizeWaveID()
7462 LLT S32 = LLT::scalar(32); in legalizeIntrinsic()
7471 LLT S32 = LLT::scalar(32); in legalizeIntrinsic()