Lines Matching refs:DstRemReg
4470 Register DstRemReg, in legalizeUnsignedDIV_REM32Impl() argument
4507 if (DstRemReg) in legalizeUnsignedDIV_REM32Impl()
4508 B.buildSelect(DstRemReg, Cond, B.buildSub(S32, R, Y), R); in legalizeUnsignedDIV_REM32Impl()
4558 Register DstRemReg, in legalizeUnsignedDIV_REM64Impl() argument
4660 if (DstRemReg) { in legalizeUnsignedDIV_REM64Impl()
4663 B.buildSelect(DstRemReg, B.buildICmp(CmpInst::ICMP_NE, S1, C3, Zero32), in legalizeUnsignedDIV_REM64Impl()
4671 Register DstDivReg, DstRemReg; in legalizeUnsignedDIV_REM() local
4680 DstRemReg = MI.getOperand(0).getReg(); in legalizeUnsignedDIV_REM()
4685 DstRemReg = MI.getOperand(1).getReg(); in legalizeUnsignedDIV_REM()
4698 legalizeUnsignedDIV_REM32Impl(B, DstDivReg, DstRemReg, Num, Den); in legalizeUnsignedDIV_REM()
4700 legalizeUnsignedDIV_REM64Impl(B, DstDivReg, DstRemReg, Num, Den); in legalizeUnsignedDIV_REM()
4732 Register DstDivReg, DstRemReg, TmpDivReg, TmpRemReg; in legalizeSignedDIV_REM() local
4742 DstRemReg = MI.getOperand(0).getReg(); in legalizeSignedDIV_REM()
4748 DstRemReg = MI.getOperand(1).getReg(); in legalizeSignedDIV_REM()
4766 if (DstRemReg) { in legalizeSignedDIV_REM()
4769 B.buildSub(DstRemReg, SignXor, Sign); in legalizeSignedDIV_REM()