Lines Matching refs:AddrDef
3326 auto AddrDef = getDefSrcRegIgnoringCopies(Addr, *MRI); in selectGlobalLoadLds() local
3327 if (isSGPR(AddrDef->Reg)) { in selectGlobalLoadLds()
3328 Addr = AddrDef->Reg; in selectGlobalLoadLds()
3329 } else if (AddrDef->MI->getOpcode() == AMDGPU::G_PTR_ADD) { in selectGlobalLoadLds()
3331 getSrcRegIgnoringCopies(AddrDef->MI->getOperand(1).getReg(), *MRI); in selectGlobalLoadLds()
3333 Register PtrBaseOffset = AddrDef->MI->getOperand(2).getReg(); in selectGlobalLoadLds()
4424 auto AddrDef = getDefSrcRegIgnoringCopies(Addr, *MRI); in selectGlobalSAddr() local
4425 if (AddrDef->MI->getOpcode() == AMDGPU::G_PTR_ADD) { in selectGlobalSAddr()
4428 getSrcRegIgnoringCopies(AddrDef->MI->getOperand(1).getReg(), *MRI); in selectGlobalSAddr()
4431 Register PtrBaseOffset = AddrDef->MI->getOperand(2).getReg(); in selectGlobalSAddr()
4451 if (AddrDef->MI->getOpcode() == AMDGPU::G_IMPLICIT_DEF || in selectGlobalSAddr()
4452 AddrDef->MI->getOpcode() == AMDGPU::G_CONSTANT || !isSGPR(AddrDef->Reg)) in selectGlobalSAddr()
4465 [=](MachineInstrBuilder &MIB) { MIB.addReg(AddrDef->Reg); }, // saddr in selectGlobalSAddr()
4489 auto AddrDef = getDefSrcRegIgnoringCopies(Addr, *MRI); in selectScratchSAddr() local
4490 if (AddrDef->MI->getOpcode() == AMDGPU::G_FRAME_INDEX) { in selectScratchSAddr()
4491 int FI = AddrDef->MI->getOperand(1).getIndex(); in selectScratchSAddr()
4498 Register SAddr = AddrDef->Reg; in selectScratchSAddr()
4500 if (AddrDef->MI->getOpcode() == AMDGPU::G_PTR_ADD) { in selectScratchSAddr()
4501 Register LHS = AddrDef->MI->getOperand(1).getReg(); in selectScratchSAddr()
4502 Register RHS = AddrDef->MI->getOperand(2).getReg(); in selectScratchSAddr()
4566 auto AddrDef = getDefSrcRegIgnoringCopies(Addr, *MRI); in selectScratchSVAddr() local
4567 if (AddrDef->MI->getOpcode() != AMDGPU::G_PTR_ADD) in selectScratchSVAddr()
4570 Register RHS = AddrDef->MI->getOperand(2).getReg(); in selectScratchSVAddr()
4574 Register LHS = AddrDef->MI->getOperand(1).getReg(); in selectScratchSVAddr()