43 AMDGPUInstructionSelector::AMDGPUInstructionSelector(  in AMDGPUInstructionSelector()  function in AMDGPUInstructionSelector
57 const char *AMDGPUInstructionSelector::getName() { return DEBUG_TYPE; }  in getName()
59 void AMDGPUInstructionSelector::setupMF(MachineFunction &MF,  in setupMF()
77 bool AMDGPUInstructionSelector::isVCC(Register Reg,  in isVCC()
99 bool AMDGPUInstructionSelector::constrainCopyLikeIntrin(MachineInstr &MI,  in constrainCopyLikeIntrin()
123 bool AMDGPUInstructionSelector::selectCOPY(MachineInstr &I) const {  in selectCOPY()
221 bool AMDGPUInstructionSelector::selectCOPY_SCC_VCC(MachineInstr &I) const {  in selectCOPY_SCC_VCC()
240 bool AMDGPUInstructionSelector::selectCOPY_VCC_SCC(MachineInstr &I) const {  in selectCOPY_VCC_SCC()
275 bool AMDGPUInstructionSelector::selectReadAnyLane(MachineInstr &I) const {  in selectReadAnyLane()
289 bool AMDGPUInstructionSelector::selectPHI(MachineInstr &I) const {  in selectPHI()
341 AMDGPUInstructionSelector::getSubOperand64(MachineOperand &MO,  in getSubOperand64()
388 bool AMDGPUInstructionSelector::selectG_AND_OR_XOR(MachineInstr &I) const {  in selectG_AND_OR_XOR()
409 bool AMDGPUInstructionSelector::selectG_ADD_SUB(MachineInstr &I) const {  in selectG_ADD_SUB()
512 bool AMDGPUInstructionSelector::selectG_UADDO_USUBO_UADDE_USUBE(  in selectG_UADDO_USUBO_UADDE_USUBE()
572 bool AMDGPUInstructionSelector::selectG_AMDGPU_MAD_64_32(  in selectG_AMDGPU_MAD_64_32()
591 bool AMDGPUInstructionSelector::selectG_EXTRACT(MachineInstr &I) const {  in selectG_EXTRACT()
636 bool AMDGPUInstructionSelector::selectG_MERGE_VALUES(MachineInstr &MI) const {  in selectG_MERGE_VALUES()
675 bool AMDGPUInstructionSelector::selectG_UNMERGE_VALUES(MachineInstr &MI) const {  in selectG_UNMERGE_VALUES()
720 bool AMDGPUInstructionSelector::selectG_BUILD_VECTOR(MachineInstr &MI) const {  in selectG_BUILD_VECTOR()
869 bool AMDGPUInstructionSelector::selectG_IMPLICIT_DEF(MachineInstr &I) const {  in selectG_IMPLICIT_DEF()
884 bool AMDGPUInstructionSelector::selectG_INSERT(MachineInstr &I) const {  in selectG_INSERT()
943 bool AMDGPUInstructionSelector::selectG_SBFX_UBFX(MachineInstr &MI) const {  in selectG_SBFX_UBFX()
967 bool AMDGPUInstructionSelector::selectInterpP1F16(MachineInstr &MI) const {  in selectInterpP1F16()
1017 bool AMDGPUInstructionSelector::selectWritelane(MachineInstr &MI) const {  in selectWritelane()
1071 bool AMDGPUInstructionSelector::selectDivScale(MachineInstr &MI) const {  in selectDivScale()
1110 bool AMDGPUInstructionSelector::selectG_INTRINSIC(MachineInstr &I) const {  in selectG_INTRINSIC()
1330 int AMDGPUInstructionSelector::getS_CMPOpcode(CmpInst::Predicate P,  in getS_CMPOpcode()
1442 bool AMDGPUInstructionSelector::selectG_ICMP_or_FCMP(MachineInstr &I) const {  in selectG_ICMP_or_FCMP()
1498 bool AMDGPUInstructionSelector::selectIntrinsicCmp(MachineInstr &I) const {  in selectIntrinsicCmp()
1588 bool AMDGPUInstructionSelector::selectBallot(MachineInstr &I) const {  in selectBallot()
1656 bool AMDGPUInstructionSelector::selectRelocConstant(MachineInstr &I) const {  in selectRelocConstant()
1680 bool AMDGPUInstructionSelector::selectGroupStaticSize(MachineInstr &I) const {  in selectGroupStaticSize()
1707 bool AMDGPUInstructionSelector::selectReturnAddress(MachineInstr &I) const {  in selectReturnAddress()
1745 bool AMDGPUInstructionSelector::selectEndCfIntrinsic(MachineInstr &MI) const {  in selectEndCfIntrinsic()
1760 bool AMDGPUInstructionSelector::selectDSOrderedIntrinsic(  in selectDSOrderedIntrinsic()
1852 bool AMDGPUInstructionSelector::selectDSGWSIntrinsic(MachineInstr &MI,  in selectDSGWSIntrinsic()
1943 bool AMDGPUInstructionSelector::selectDSAppendConsume(MachineInstr &MI,  in selectDSAppendConsume()
1975 bool AMDGPUInstructionSelector::selectInitWholeWave(MachineInstr &MI) const {  in selectInitWholeWave()
1983 bool AMDGPUInstructionSelector::selectSBarrier(MachineInstr &MI) const {  in selectSBarrier()
2029 bool AMDGPUInstructionSelector::selectImageIntrinsic(  in selectImageIntrinsic()
2271 bool AMDGPUInstructionSelector::selectDSBvhStackIntrinsic(  in selectDSBvhStackIntrinsic()
2310 bool AMDGPUInstructionSelector::selectG_INTRINSIC_W_SIDE_EFFECTS(  in selectG_INTRINSIC_W_SIDE_EFFECTS()
2374 bool AMDGPUInstructionSelector::selectG_SELECT(MachineInstr &I) const {  in selectG_SELECT()
2425 bool AMDGPUInstructionSelector::selectG_TRUNC(MachineInstr &I) const {  in selectG_TRUNC()
2571 const RegisterBank *AMDGPUInstructionSelector::getArtifactRegBank(  in getArtifactRegBank()
2584 bool AMDGPUInstructionSelector::selectG_SZA_EXT(MachineInstr &I) const {  in selectG_SZA_EXT()
2779 bool AMDGPUInstructionSelector::selectG_FPEXT(MachineInstr &I) const {  in selectG_FPEXT()
2804 bool AMDGPUInstructionSelector::selectG_FNEG(MachineInstr &MI) const {  in selectG_FNEG()
2861 bool AMDGPUInstructionSelector::selectG_FABS(MachineInstr &MI) const {  in selectG_FABS()
2907 void AMDGPUInstructionSelector::getAddrModeInfo(const MachineInstr &Load,  in getAddrModeInfo()
2943 bool AMDGPUInstructionSelector::isSGPR(Register Reg) const {  in isSGPR()
2947 bool AMDGPUInstructionSelector::isInstrUniform(const MachineInstr &MI) const {  in isInstrUniform()
2972 bool AMDGPUInstructionSelector::hasVgprParts(ArrayRef<GEPInfo> AddrInfo) const {  in hasVgprParts()
2980 void AMDGPUInstructionSelector::initM0(MachineInstr &I) const {  in initM0()
2993 bool AMDGPUInstructionSelector::selectG_LOAD_STORE_ATOMICRMW(  in selectG_LOAD_STORE_ATOMICRMW()
3020 bool AMDGPUInstructionSelector::selectG_BRCOND(MachineInstr &I) const {  in selectG_BRCOND()
3077 bool AMDGPUInstructionSelector::selectG_GLOBAL_VALUE(  in selectG_GLOBAL_VALUE()
3090 bool AMDGPUInstructionSelector::selectG_PTRMASK(MachineInstr &I) const {  in selectG_PTRMASK()
3229 bool AMDGPUInstructionSelector::selectG_EXTRACT_VECTOR_ELT(  in selectG_EXTRACT_VECTOR_ELT()
3306 bool AMDGPUInstructionSelector::selectG_INSERT_VECTOR_ELT(  in selectG_INSERT_VECTOR_ELT()
3379 bool AMDGPUInstructionSelector::selectBufferLoadLds(MachineInstr &MI) const {  in selectBufferLoadLds()
3516 bool AMDGPUInstructionSelector::selectGlobalLoadLds(MachineInstr &MI) const{  in selectGlobalLoadLds()
3611 bool AMDGPUInstructionSelector::selectBVHIntersectRayIntrinsic(  in selectBVHIntersectRayIntrinsic()
3623 bool AMDGPUInstructionSelector::selectSMFMACIntrin(MachineInstr &MI) const {  in selectSMFMACIntrin()
3724 bool AMDGPUInstructionSelector::selectPermlaneSwapIntrin(  in selectPermlaneSwapIntrin()
3747 bool AMDGPUInstructionSelector::selectWaveAddress(MachineInstr &MI) const {  in selectWaveAddress()
3892 bool AMDGPUInstructionSelector::selectBITOP3(MachineInstr &MI) const {  in selectBITOP3()
3976 bool AMDGPUInstructionSelector::selectStackRestore(MachineInstr &MI) const {  in selectStackRestore()
4003 bool AMDGPUInstructionSelector::select(MachineInstr &I) {  in select()
4163 AMDGPUInstructionSelector::selectVCSRC(MachineOperand &Root) const {  in selectVCSRC()
4170 std::pair<Register, unsigned> AMDGPUInstructionSelector::selectVOP3ModsImpl(  in selectVOP3ModsImpl()
4201 Register AMDGPUInstructionSelector::copyToVGPRIfSrcFolded(  in copyToVGPRIfSrcFolded()
4224 AMDGPUInstructionSelector::selectVSRC0(MachineOperand &Root) const {  in selectVSRC0()
4231 AMDGPUInstructionSelector::selectVOP3Mods0(MachineOperand &Root) const {  in selectVOP3Mods0()
4247 AMDGPUInstructionSelector::selectVOP3BMods0(MachineOperand &Root) const {  in selectVOP3BMods0()
4265 AMDGPUInstructionSelector::selectVOP3OMods(MachineOperand &Root) const {  in selectVOP3OMods()
4274 AMDGPUInstructionSelector::selectVOP3Mods(MachineOperand &Root) const {  in selectVOP3Mods()
4288 AMDGPUInstructionSelector::selectVOP3ModsNonCanonicalizing(  in selectVOP3ModsNonCanonicalizing()
4304 AMDGPUInstructionSelector::selectVOP3BMods(MachineOperand &Root) const {  in selectVOP3BMods()
4320 AMDGPUInstructionSelector::selectVOP3NoMods(MachineOperand &Root) const {  in selectVOP3NoMods()
4776 std::pair<Register, unsigned> AMDGPUInstructionSelector::selectVOP3PModsImpl(  in selectVOP3PModsImpl()
4881 AMDGPUInstructionSelector::selectVOP3PRetHelper(MachineOperand &Root,  in selectVOP3PRetHelper()
4896 AMDGPUInstructionSelector::selectVOP3PMods(MachineOperand &Root) const {  in selectVOP3PMods()
4902 AMDGPUInstructionSelector::selectVOP3PModsDOT(MachineOperand &Root) const {  in selectVOP3PModsDOT()
4908 AMDGPUInstructionSelector::selectVOP3PModsNeg(MachineOperand &Root) const {  in selectVOP3PModsNeg()
4923 AMDGPUInstructionSelector::selectWMMAOpSelVOP3PMods(  in selectWMMAOpSelVOP3PMods()
4995 AMDGPUInstructionSelector::selectWMMAModsF32NegAbs(MachineOperand &Root) const {  in selectWMMAModsF32NegAbs()
5026 AMDGPUInstructionSelector::selectWMMAModsF16Neg(MachineOperand &Root) const {  in selectWMMAModsF16Neg()
5052 AMDGPUInstructionSelector::selectWMMAModsF16NegAbs(MachineOperand &Root) const {  in selectWMMAModsF16NegAbs()
5085 AMDGPUInstructionSelector::selectWMMAVISrc(MachineOperand &Root) const {  in selectWMMAVISrc()
5110 AMDGPUInstructionSelector::selectSWMMACIndex8(MachineOperand &Root) const {  in selectSWMMACIndex8()
5131 AMDGPUInstructionSelector::selectSWMMACIndex16(MachineOperand &Root) const {  in selectSWMMACIndex16()
5153 AMDGPUInstructionSelector::selectVOP3OpSelMods(MachineOperand &Root) const {  in selectVOP3OpSelMods()
5167 AMDGPUInstructionSelector::selectVINTERPMods(MachineOperand &Root) const {  in selectVINTERPMods()
5185 AMDGPUInstructionSelector::selectVINTERPModsHi(MachineOperand &Root) const {  in selectVINTERPModsHi()
5202 bool AMDGPUInstructionSelector::selectSmrdOffset(MachineOperand &Root,  in selectSmrdOffset()
5284 AMDGPUInstructionSelector::selectSmrdImm(MachineOperand &Root) const {  in selectSmrdImm()
5295 AMDGPUInstructionSelector::selectSmrdImm32(MachineOperand &Root) const {  in selectSmrdImm32()
5316 AMDGPUInstructionSelector::selectSmrdSgpr(MachineOperand &Root) const {  in selectSmrdSgpr()
5326 AMDGPUInstructionSelector::selectSmrdSgprImm(MachineOperand &Root) const {  in selectSmrdSgprImm()
5338 AMDGPUInstructionSelector::selectFlatOffsetImpl(MachineOperand &Root,  in selectFlatOffsetImpl()
5364 AMDGPUInstructionSelector::selectFlatOffset(MachineOperand &Root) const {  in selectFlatOffset()
5374 AMDGPUInstructionSelector::selectGlobalOffset(MachineOperand &Root) const {  in selectGlobalOffset()
5384 AMDGPUInstructionSelector::selectScratchOffset(MachineOperand &Root) const {  in selectScratchOffset()
5395 AMDGPUInstructionSelector::selectGlobalSAddr(MachineOperand &Root) const {  in selectGlobalSAddr()
5506 AMDGPUInstructionSelector::selectScratchSAddr(MachineOperand &Root) const {  in selectScratchSAddr()
5565 bool AMDGPUInstructionSelector::checkFlatScratchSVSSwizzleBug(  in checkFlatScratchSVSSwizzleBug()
5582 AMDGPUInstructionSelector::selectScratchSVAddr(MachineOperand &Root) const {  in selectScratchSVAddr()
5642 AMDGPUInstructionSelector::selectMUBUFScratchOffen(MachineOperand &Root) const {  in selectMUBUFScratchOffen()
5721 bool AMDGPUInstructionSelector::isDSOffsetLegal(Register Base,  in isDSOffsetLegal()
5734 bool AMDGPUInstructionSelector::isDSOffset2Legal(Register Base, int64_t Offset0,  in isDSOffset2Legal()
5760 bool AMDGPUInstructionSelector::isFlatScratchBaseLegal(Register Addr) const {  in isFlatScratchBaseLegal()
5791 bool AMDGPUInstructionSelector::isFlatScratchBaseLegalSV(Register Addr) const {  in isFlatScratchBaseLegalSV()
5809 bool AMDGPUInstructionSelector::isFlatScratchBaseLegalSVImm(  in isFlatScratchBaseLegalSVImm()
5839 bool AMDGPUInstructionSelector::isUnneededShiftMask(const MachineInstr &MI,  in isUnneededShiftMask()
5856 AMDGPUInstructionSelector::selectMUBUFScratchOffset(  in selectMUBUFScratchOffset()
5919 AMDGPUInstructionSelector::selectDS1Addr1OffsetImpl(MachineOperand &Root) const {  in selectDS1Addr1OffsetImpl()
5946 AMDGPUInstructionSelector::selectDS1Addr1Offset(MachineOperand &Root) const {  in selectDS1Addr1Offset()
5957 AMDGPUInstructionSelector::selectDS64Bit4ByteAligned(MachineOperand &Root) const {  in selectDS64Bit4ByteAligned()
5962 AMDGPUInstructionSelector::selectDS128Bit8ByteAligned(MachineOperand &Root) const {  in selectDS128Bit8ByteAligned()
5967 AMDGPUInstructionSelector::selectDSReadWrite2(MachineOperand &Root,  in selectDSReadWrite2()
5980 AMDGPUInstructionSelector::selectDSReadWrite2Impl(MachineOperand &Root,  in selectDSReadWrite2Impl()
6013 AMDGPUInstructionSelector::getPtrBaseWithConstantOffset(  in getPtrBaseWithConstantOffset()
6094 AMDGPUInstructionSelector::MUBUFAddressData
6095 AMDGPUInstructionSelector::parseMUBUFAddress(Register Src) const {  in parseMUBUFAddress()
6126 bool AMDGPUInstructionSelector::shouldUseAddr64(MUBUFAddressData Addr) const {  in shouldUseAddr64()
6139 void AMDGPUInstructionSelector::splitIllegalMUBUFOffset(  in splitIllegalMUBUFOffset()
6152 bool AMDGPUInstructionSelector::selectMUBUFAddr64Impl(  in selectMUBUFAddr64Impl()
6203 bool AMDGPUInstructionSelector::selectMUBUFOffsetImpl(  in selectMUBUFOffsetImpl()
6229 AMDGPUInstructionSelector::selectMUBUFAddr64(MachineOperand &Root) const {  in selectMUBUFAddr64()
6265 AMDGPUInstructionSelector::selectMUBUFOffset(MachineOperand &Root) const {  in selectMUBUFOffset()
6293 AMDGPUInstructionSelector::selectBUFSOffset(MachineOperand &Root) const {  in selectBUFSOffset()
6314 AMDGPUInstructionSelector::selectSMRDBufferImm(MachineOperand &Root) const {  in selectSMRDBufferImm()
6329 AMDGPUInstructionSelector::selectSMRDBufferImm32(MachineOperand &Root) const {  in selectSMRDBufferImm32()
6345 AMDGPUInstructionSelector::selectSMRDBufferSgprImm(MachineOperand &Root) const {  in selectSMRDBufferSgprImm()
6366 AMDGPUInstructionSelector::selectVOP3PMadMixModsImpl(MachineOperand &Root,  in selectVOP3PMadMixModsImpl()
6418 AMDGPUInstructionSelector::selectVOP3PMadMixModsExt(  in selectVOP3PMadMixModsExt()
6434 AMDGPUInstructionSelector::selectVOP3PMadMixMods(MachineOperand &Root) const {  in selectVOP3PMadMixMods()
6446 bool AMDGPUInstructionSelector::selectSBarrierSignalIsfirst(  in selectSBarrierSignalIsfirst()
6465 bool AMDGPUInstructionSelector::selectSGetBarrierState(  in selectSGetBarrierState()
6514 bool AMDGPUInstructionSelector::selectNamedBarrierInit(  in selectNamedBarrierInit()
6565 bool AMDGPUInstructionSelector::selectNamedBarrierInst(  in selectNamedBarrierInst()
6616 void AMDGPUInstructionSelector::renderTruncImm32(MachineInstrBuilder &MIB,  in renderTruncImm32()
6624 void AMDGPUInstructionSelector::renderNegateImm(MachineInstrBuilder &MIB,  in renderNegateImm()
6632 void AMDGPUInstructionSelector::renderBitcastFPImm(MachineInstrBuilder &MIB,  in renderBitcastFPImm()
6640 void AMDGPUInstructionSelector::renderPopcntImm(MachineInstrBuilder &MIB,  in renderPopcntImm()
6650 void AMDGPUInstructionSelector::renderTruncTImm(MachineInstrBuilder &MIB,  in renderTruncTImm()
6661 void AMDGPUInstructionSelector::renderZextBoolTImm(MachineInstrBuilder &MIB,  in renderZextBoolTImm()
6667 void AMDGPUInstructionSelector::renderOpSelTImm(MachineInstrBuilder &MIB,  in renderOpSelTImm()
6674 void AMDGPUInstructionSelector::renderSrcAndDstSelToOpSelXForm_0_0(  in renderSrcAndDstSelToOpSelXForm_0_0()
6681 void AMDGPUInstructionSelector::renderSrcAndDstSelToOpSelXForm_0_1(  in renderSrcAndDstSelToOpSelXForm_0_1()
6689 void AMDGPUInstructionSelector::renderSrcAndDstSelToOpSelXForm_1_0(  in renderSrcAndDstSelToOpSelXForm_1_0()
6696 void AMDGPUInstructionSelector::renderSrcAndDstSelToOpSelXForm_1_1(  in renderSrcAndDstSelToOpSelXForm_1_1()
6704 void AMDGPUInstructionSelector::renderDstSelToOpSelXForm(  in renderDstSelToOpSelXForm()
6711 void AMDGPUInstructionSelector::renderSrcSelToOpSelXForm(  in renderSrcSelToOpSelXForm()
6718 void AMDGPUInstructionSelector::renderSrcAndDstSelToOpSelXForm_2_0(  in renderSrcAndDstSelToOpSelXForm_2_0()
6725 void AMDGPUInstructionSelector::renderDstSelToOpSel3XFormXForm(  in renderDstSelToOpSel3XFormXForm()
6732 void AMDGPUInstructionSelector::renderExtractCPol(MachineInstrBuilder &MIB,  in renderExtractCPol()
6741 void AMDGPUInstructionSelector::renderExtractSWZ(MachineInstrBuilder &MIB,  in renderExtractSWZ()
6751 void AMDGPUInstructionSelector::renderExtractCpolSetGLC(  in renderExtractCpolSetGLC()
6760 void AMDGPUInstructionSelector::renderFrameIndex(MachineInstrBuilder &MIB,  in renderFrameIndex()
6766 void AMDGPUInstructionSelector::renderFPPow2ToExponent(MachineInstrBuilder &MIB,  in renderFPPow2ToExponent()
6775 void AMDGPUInstructionSelector::renderRoundMode(MachineInstrBuilder &MIB,  in renderRoundMode()
6786 void AMDGPUInstructionSelector::renderScaledMAIIntrinsicOperand(  in renderScaledMAIIntrinsicOperand()
6797 bool AMDGPUInstructionSelector::isInlineImmediate(const APInt &Imm) const {  in isInlineImmediate()
6801 bool AMDGPUInstructionSelector::isInlineImmediate(const APFloat &Imm) const {  in isInlineImmediate()