Lines Matching +full:0 +full:x10002
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
18 SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>, SDTCisInt<0>, SDTCisInt<3>
22 [SDTCisInt<0>, SDTCisFP<1>, SDTCisInt<2>]
34 [SDTCisFP<0>, SDTCisInt<1>, SDTCisSameAs<0, 2>, SDTCisSameAs<0, 3>, SDTCisSameAs<0, 4>]
39 [SDTCisFP<0>, SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>, SDTCisSameAs<0, 3>, SDTCisInt<4>]
42 def ImmOp : SDTypeProfile<0, 1, [SDTCisInt<0>]>;
43 def AMDGPUKillSDT : SDTypeProfile<0, 1, [SDTCisInt<0>]>;
46 [SDTCisVT<0, i1>, SDTCisVT<1, i1>, SDTCisVT<2, OtherVT>]
50 [SDTCisVT<0, i1>, SDTCisVT<1, i1>, SDTCisVT<2, OtherVT>]
53 def AMDGPULoopOp : SDTypeProfile<0, 2,
54 [SDTCisVT<0, i1>, SDTCisVT<1, OtherVT>]
58 [SDTCisVT<0, i1>, SDTCisVT<1, i1>, SDTCisVT<2, i1>]
70 SDCallSeqStart<[ SDTCisVT<0, i32>, SDTCisVT<1, i32> ]>,
75 SDCallSeqEnd<[ SDTCisVT<0, i32>, SDTCisVT<1, i32> ]>,
80 SDTypeProfile<0, -1, [SDTCisPtrTy<0>]>,
85 def AMDGPUTCReturnTP : SDTypeProfile<0, 3, [
86 SDTCisPtrTy<0>
98 SDTypeProfile<0, -1, [SDTCisPtrTy<0>]>,
103 SDTypeProfile<0, -1, [SDTCisVT<0, i16>]>,
108 "AMDGPUISD::CONST_DATA_PTR", SDTypeProfile <1, 1, [SDTCisVT<0, iPTR>,
109 SDTCisVT<0, iPTR>]>
208 // out = (src0 + src1 > 0xFFFFFFFF) ? 1 : 0
211 // out = (src1 > src0) ? 1 : 0
215 SDTCisInt<0>, SDTCisSameAs<1, 2>, SDTCisVT<3, OtherVT>
264 SDTypeProfile<0, 3, [SDTCisPtrTy<1>, SDTCisInt<2>]>,
272 // src0: vec4(src, 0, 0, mask)
275 SDTypeProfile<0, 2, []>,
296 SDTCisInt<0>, SDTCisInt<1>, SDTCisSameAs<1, 2>
309 // Given a = 0x10002, b = c = 0xffffff:
310 // mulhi24(mulhi24(a, b), c) = mulhi24(0x100, 0xffffff) = 0
312 // mulhi24(a, mulhi24(b, c)) = mulhi24(0x10002, 0xffff) = 1
338 SDTypeProfile<1, 4, [SDTCisSameAs<0, 3>, SDTCisSameAs<1, 2>,
339 SDTCisFP<0>, SDTCisVec<1>,
346 def AMDGPUExportOp : SDTypeProfile<0, 8, [
347 SDTCisInt<0>, // i8 tgt
364 def SDTIL_BRCond : SDTypeProfile<0, 2, [
365 SDTCisVT<0, OtherVT>