Lines Matching refs:SOffset

1339                                      SDValue &SOffset, SDValue &Offset,  in SelectMUBUF()  argument
1352 SOffset = Subtarget->hasRestrictedSOffset() in SelectMUBUF()
1418 SOffset = in SelectMUBUF()
1427 SDValue &VAddr, SDValue &SOffset, in SelectMUBUFAddr64() argument
1436 if (!SelectMUBUF(Addr, Ptr, VAddr, SOffset, Offset, Offen, Idxen, Addr64)) in SelectMUBUFAddr64()
1469 SDValue &VAddr, SDValue &SOffset, in SelectMUBUFScratchOffen() argument
1491 SOffset = CurDAG->getTargetConstant(0, DL, MVT::i32); in SelectMUBUFScratchOffen()
1522 std::tie(VAddr, SOffset) = foldFrameIndex(N0); in SelectMUBUFScratchOffen()
1529 std::tie(VAddr, SOffset) = foldFrameIndex(Addr); in SelectMUBUFScratchOffen()
1547 SDValue &SOffset, in SelectMUBUFScratchOffset() argument
1559 SOffset = Addr; in SelectMUBUFScratchOffset()
1573 SOffset = Addr.getOperand(0); in SelectMUBUFScratchOffset()
1577 SOffset = CurDAG->getTargetConstant(0, DL, MVT::i32); in SelectMUBUFScratchOffset()
1589 SDValue &SOffset, SDValue &Offset in SelectMUBUFOffset() argument
1594 if (!SelectMUBUF(Addr, Ptr, VAddr, SOffset, Offset, Offen, Idxen, Addr64)) in SelectMUBUFOffset()
1614 SDValue &SOffset) const { in SelectBUFSOffset()
1616 SOffset = CurDAG->getRegister(AMDGPU::SGPR_NULL, MVT::i32); in SelectBUFSOffset()
1620 SOffset = ByteOffsetNode; in SelectBUFSOffset()
2010 bool AMDGPUDAGToDAGISel::isSOffsetLegalWithImmOffset(SDValue *SOffset, in isSOffsetLegalWithImmOffset() argument
2016 KnownBits SKnown = CurDAG->computeKnownBits(*SOffset); in isSOffsetLegalWithImmOffset()
2028 SDValue *SOffset, SDValue *Offset, in SelectSMRDOffset() argument
2032 assert((!SOffset || !Offset) && in SelectSMRDOffset()
2037 if (!SOffset) in SelectSMRDOffset()
2042 *SOffset = ByteOffsetNode; in SelectSMRDOffset()
2043 return isSOffsetLegalWithImmOffset(SOffset, Imm32Only, IsBuffer, in SelectSMRDOffset()
2048 *SOffset = ByteOffsetNode.getOperand(0); in SelectSMRDOffset()
2049 return isSOffsetLegalWithImmOffset(SOffset, Imm32Only, IsBuffer, in SelectSMRDOffset()
2081 if (SOffset) { in SelectSMRDOffset()
2083 *SOffset = SDValue( in SelectSMRDOffset()
2120 SDValue *SOffset, SDValue *Offset, in SelectSMRDBaseOffset() argument
2124 if (SOffset && Offset) { in SelectSMRDBaseOffset()
2135 return SelectSMRDBaseOffset(B, SBase, SOffset, nullptr, false, false, true, in SelectSMRDBaseOffset()
2156 if (SelectSMRDOffset(N1, SOffset, Offset, Imm32Only, IsBuffer, HasSOffset, in SelectSMRDBaseOffset()
2161 if (SelectSMRDOffset(N0, SOffset, Offset, Imm32Only, IsBuffer, HasSOffset, in SelectSMRDBaseOffset()
2170 SDValue *SOffset, SDValue *Offset, in SelectSMRD() argument
2172 if (SelectSMRDBaseOffset(Addr, SBase, SOffset, Offset, Imm32Only)) { in SelectSMRD()
2177 if (Addr.getValueType() == MVT::i32 && Offset && !SOffset) { in SelectSMRD()
2199 SDValue &SOffset) const { in SelectSMRDSgpr()
2200 return SelectSMRD(Addr, SBase, &SOffset, /* Offset */ nullptr); in SelectSMRDSgpr()
2204 SDValue &SOffset, in SelectSMRDSgprImm() argument
2206 return SelectSMRD(Addr, SBase, &SOffset, &Offset); in SelectSMRDSgprImm()
2221 bool AMDGPUDAGToDAGISel::SelectSMRDBufferSgprImm(SDValue N, SDValue &SOffset, in SelectSMRDBufferSgprImm() argument
2226 SelectSMRDBaseOffset(N, /* SBase */ SOffset, /* SOffset*/ nullptr, in SelectSMRDBufferSgprImm()