122 AMDGPUDAGToDAGISel::AMDGPUDAGToDAGISel(TargetMachine &TM,  in AMDGPUDAGToDAGISel()  function in AMDGPUDAGToDAGISel
128 bool AMDGPUDAGToDAGISel::runOnMachineFunction(MachineFunction &MF) {  in runOnMachineFunction()
135 bool AMDGPUDAGToDAGISel::fp16SrcZerosHighBits(unsigned Opc) const {  in fp16SrcZerosHighBits()
219 bool AMDGPUDAGToDAGISel::matchLoadD16FromBuildVector(SDNode *N) const {  in matchLoadD16FromBuildVector()
299 void AMDGPUDAGToDAGISel::PreprocessISelDAG() {  in PreprocessISelDAG()
328 bool AMDGPUDAGToDAGISel::isInlineImmediate(const SDNode *N) const {  in isInlineImmediate()
346 const TargetRegisterClass *AMDGPUDAGToDAGISel::getOperandRegClass(SDNode *N,  in getOperandRegClass()
390 SDNode *AMDGPUDAGToDAGISel::glueCopyToOp(SDNode *N, SDValue NewChain,  in glueCopyToOp()
401 SDNode *AMDGPUDAGToDAGISel::glueCopyToM0(SDNode *N, SDValue Val) const {  in glueCopyToM0()
411 SDNode *AMDGPUDAGToDAGISel::glueCopyToM0LDSInit(SDNode *N) const {  in glueCopyToM0LDSInit()
425 MachineSDNode *AMDGPUDAGToDAGISel::buildSMovImm64(SDLoc &DL, uint64_t Imm,  in buildSMovImm64()
441 void AMDGPUDAGToDAGISel::SelectBuildVector(SDNode *N, unsigned RegClassID) {  in SelectBuildVector()
496 void AMDGPUDAGToDAGISel::Select(SDNode *N) {  in Select()
712 bool AMDGPUDAGToDAGISel::isUniformBr(const SDNode *N) const {  in isUniformBr()
719 bool AMDGPUDAGToDAGISel::isUnneededShiftMask(const SDNode *N,  in isUnneededShiftMask()
762 bool AMDGPUDAGToDAGISel::isBaseWithConstantOffset64(SDValue Addr, SDValue &LHS,  in isBaseWithConstantOffset64()
784           std::make_unique<AMDGPUDAGToDAGISel>(TM, TM.getOptLevel())) {}  in AMDGPUISelDAGToDAGPass()
805 bool AMDGPUDAGToDAGISel::SelectADDRVTX_READ(SDValue Addr, SDValue &Base,  in SelectADDRVTX_READ()
810 bool AMDGPUDAGToDAGISel::SelectADDRIndirect(SDValue Addr, SDValue &Base,  in SelectADDRIndirect()
834 SDValue AMDGPUDAGToDAGISel::getMaterializedScalarImm32(int64_t Val,  in getMaterializedScalarImm32()
843 void AMDGPUDAGToDAGISel::SelectADD_SUB_I64(SDNode *N) {  in SelectADD_SUB_I64()
912 void AMDGPUDAGToDAGISel::SelectAddcSubb(SDNode *N) {  in SelectAddcSubb()
932 void AMDGPUDAGToDAGISel::SelectUADDO_USUBO(SDNode *N) {  in SelectUADDO_USUBO()
965 void AMDGPUDAGToDAGISel::SelectFMA_W_CHAIN(SDNode *N) {  in SelectFMA_W_CHAIN()
986 void AMDGPUDAGToDAGISel::SelectFMUL_W_CHAIN(SDNode *N) {  in SelectFMUL_W_CHAIN()
1001 void AMDGPUDAGToDAGISel::SelectDIV_SCALE(SDNode *N) {  in SelectDIV_SCALE()
1021 void AMDGPUDAGToDAGISel::SelectMAD_64_32(SDNode *N) {  in SelectMAD_64_32()
1039 void AMDGPUDAGToDAGISel::SelectMUL_LOHI(SDNode *N) {  in SelectMUL_LOHI()
1068 bool AMDGPUDAGToDAGISel::isDSOffsetLegal(SDValue Base, unsigned Offset) const {  in isDSOffsetLegal()
1081 bool AMDGPUDAGToDAGISel::SelectDS1Addr1Offset(SDValue Addr, SDValue &Base,  in SelectDS1Addr1Offset()
1153 bool AMDGPUDAGToDAGISel::isDSOffset2Legal(SDValue Base, unsigned Offset0,  in isDSOffset2Legal()
1180 bool AMDGPUDAGToDAGISel::isFlatScratchBaseLegal(SDValue Addr) const {  in isFlatScratchBaseLegal()
1207 bool AMDGPUDAGToDAGISel::isFlatScratchBaseLegalSV(SDValue Addr) const {  in isFlatScratchBaseLegalSV()
1223 bool AMDGPUDAGToDAGISel::isFlatScratchBaseLegalSVImm(SDValue Addr) const {  in isFlatScratchBaseLegalSVImm()
1246 bool AMDGPUDAGToDAGISel::SelectDS64Bit4ByteAligned(SDValue Addr, SDValue &Base,  in SelectDS64Bit4ByteAligned()
1252 bool AMDGPUDAGToDAGISel::SelectDS128Bit8ByteAligned(SDValue Addr, SDValue &Base,  in SelectDS128Bit8ByteAligned()
1258 bool AMDGPUDAGToDAGISel::SelectDSReadWrite2(SDValue Addr, SDValue &Base,  in SelectDSReadWrite2()
1338 bool AMDGPUDAGToDAGISel::SelectMUBUF(SDValue Addr, SDValue &Ptr, SDValue &VAddr,  in SelectMUBUF()
1426 bool AMDGPUDAGToDAGISel::SelectMUBUFAddr64(SDValue Addr, SDValue &SRsrc,  in SelectMUBUFAddr64()
1453 std::pair<SDValue, SDValue> AMDGPUDAGToDAGISel::foldFrameIndex(SDValue N) const {  in foldFrameIndex()
1467 bool AMDGPUDAGToDAGISel::SelectMUBUFScratchOffen(SDNode *Parent,  in SelectMUBUFScratchOffen()
1544 bool AMDGPUDAGToDAGISel::SelectMUBUFScratchOffset(SDNode *Parent,  in SelectMUBUFScratchOffset()
1588 bool AMDGPUDAGToDAGISel::SelectMUBUFOffset(SDValue Addr, SDValue &SRsrc,  in SelectMUBUFOffset()
1613 bool AMDGPUDAGToDAGISel::SelectBUFSOffset(SDValue ByteOffsetNode,  in SelectBUFSOffset()
1638 bool AMDGPUDAGToDAGISel::SelectFlatOffsetImpl(SDNode *N, SDValue Addr,  in SelectFlatOffsetImpl()
1733 bool AMDGPUDAGToDAGISel::SelectFlatOffset(SDNode *N, SDValue Addr,  in SelectFlatOffset()
1739 bool AMDGPUDAGToDAGISel::SelectGlobalOffset(SDNode *N, SDValue Addr,  in SelectGlobalOffset()
1745 bool AMDGPUDAGToDAGISel::SelectScratchOffset(SDNode *N, SDValue Addr,  in SelectScratchOffset()
1762 bool AMDGPUDAGToDAGISel::SelectGlobalSAddr(SDNode *N,  in SelectGlobalSAddr()
1876 bool AMDGPUDAGToDAGISel::SelectScratchSAddr(SDNode *Parent, SDValue Addr,  in SelectScratchSAddr()
1920 bool AMDGPUDAGToDAGISel::checkFlatScratchSVSSwizzleBug(  in checkFlatScratchSVSSwizzleBug()
1938 bool AMDGPUDAGToDAGISel::SelectScratchSVAddr(SDNode *N, SDValue Addr,  in SelectScratchSVAddr()
2010 bool AMDGPUDAGToDAGISel::isSOffsetLegalWithImmOffset(SDValue *SOffset,  in isSOffsetLegalWithImmOffset()
2027 bool AMDGPUDAGToDAGISel::SelectSMRDOffset(SDValue ByteOffsetNode,  in SelectSMRDOffset()
2091 SDValue AMDGPUDAGToDAGISel::Expand32BitAddress(SDValue Addr) const {  in Expand32BitAddress()
2119 bool AMDGPUDAGToDAGISel::SelectSMRDBaseOffset(SDValue Addr, SDValue &SBase,  in SelectSMRDBaseOffset()
2169 bool AMDGPUDAGToDAGISel::SelectSMRD(SDValue Addr, SDValue &SBase,  in SelectSMRD()
2186 bool AMDGPUDAGToDAGISel::SelectSMRDImm(SDValue Addr, SDValue &SBase,  in SelectSMRDImm()
2191 bool AMDGPUDAGToDAGISel::SelectSMRDImm32(SDValue Addr, SDValue &SBase,  in SelectSMRDImm32()
2198 bool AMDGPUDAGToDAGISel::SelectSMRDSgpr(SDValue Addr, SDValue &SBase,  in SelectSMRDSgpr()
2203 bool AMDGPUDAGToDAGISel::SelectSMRDSgprImm(SDValue Addr, SDValue &SBase,  in SelectSMRDSgprImm()
2209 bool AMDGPUDAGToDAGISel::SelectSMRDBufferImm(SDValue N, SDValue &Offset) const {  in SelectSMRDBufferImm()
2214 bool AMDGPUDAGToDAGISel::SelectSMRDBufferImm32(SDValue N,  in SelectSMRDBufferImm32()
2221 bool AMDGPUDAGToDAGISel::SelectSMRDBufferSgprImm(SDValue N, SDValue &SOffset,  in SelectSMRDBufferSgprImm()
2231 bool AMDGPUDAGToDAGISel::SelectMOVRELOffset(SDValue Index,  in SelectMOVRELOffset()
2261 SDNode *AMDGPUDAGToDAGISel::getBFE32(bool IsSigned, const SDLoc &DL,  in getBFE32()
2281 void AMDGPUDAGToDAGISel::SelectS_BFEFromShifts(SDNode *N) {  in SelectS_BFEFromShifts()
2304 void AMDGPUDAGToDAGISel::SelectS_BFE(SDNode *N) {  in SelectS_BFE()
2378 bool AMDGPUDAGToDAGISel::isCBranchSCC(const SDNode *N) const {  in isCBranchSCC()
2431 void AMDGPUDAGToDAGISel::SelectBRCOND(SDNode *N) {  in SelectBRCOND()
2517 void AMDGPUDAGToDAGISel::SelectFP_EXTEND(SDNode *N) {  in SelectFP_EXTEND()
2533 void AMDGPUDAGToDAGISel::SelectDSAppendConsume(SDNode *N, unsigned IntrID) {  in SelectDSAppendConsume()
2575 void AMDGPUDAGToDAGISel::SelectDSBvhStackIntrinsic(SDNode *N) {  in SelectDSBvhStackIntrinsic()
2605 void AMDGPUDAGToDAGISel::SelectDS_GWS(SDNode *N, unsigned IntrID) {  in SelectDS_GWS()
2671 void AMDGPUDAGToDAGISel::SelectInterpP1F16(SDNode *N) {  in SelectInterpP1F16()
2729 void AMDGPUDAGToDAGISel::SelectINTRINSIC_W_CHAIN(SDNode *N) {  in SelectINTRINSIC_W_CHAIN()
2747 void AMDGPUDAGToDAGISel::SelectINTRINSIC_WO_CHAIN(SDNode *N) {  in SelectINTRINSIC_WO_CHAIN()
2795 void AMDGPUDAGToDAGISel::SelectINTRINSIC_VOID(SDNode *N) {  in SelectINTRINSIC_VOID()
2813 void AMDGPUDAGToDAGISel::SelectWAVE_ADDRESS(SDNode *N) {  in SelectWAVE_ADDRESS()
2820 void AMDGPUDAGToDAGISel::SelectSTACKRESTORE(SDNode *N) {  in SelectSTACKRESTORE()
2852 bool AMDGPUDAGToDAGISel::SelectVOP3ModsImpl(SDValue In, SDValue &Src,  in SelectVOP3ModsImpl()
2880 bool AMDGPUDAGToDAGISel::SelectVOP3Mods(SDValue In, SDValue &Src,  in SelectVOP3Mods()
2892 bool AMDGPUDAGToDAGISel::SelectVOP3ModsNonCanonicalizing(  in SelectVOP3ModsNonCanonicalizing()
2904 bool AMDGPUDAGToDAGISel::SelectVOP3BMods(SDValue In, SDValue &Src,  in SelectVOP3BMods()
2917 bool AMDGPUDAGToDAGISel::SelectVOP3NoMods(SDValue In, SDValue &Src) const {  in SelectVOP3NoMods()
2925 bool AMDGPUDAGToDAGISel::SelectVINTERPModsImpl(SDValue In, SDValue &Src,  in SelectVINTERPModsImpl()
2941 bool AMDGPUDAGToDAGISel::SelectVINTERPMods(SDValue In, SDValue &Src,  in SelectVINTERPMods()
2946 bool AMDGPUDAGToDAGISel::SelectVINTERPModsHi(SDValue In, SDValue &Src,  in SelectVINTERPModsHi()
2951 bool AMDGPUDAGToDAGISel::SelectVOP3Mods0(SDValue In, SDValue &Src,  in SelectVOP3Mods0()
2961 bool AMDGPUDAGToDAGISel::SelectVOP3BMods0(SDValue In, SDValue &Src,  in SelectVOP3BMods0()
2971 bool AMDGPUDAGToDAGISel::SelectVOP3OMods(SDValue In, SDValue &Src,  in SelectVOP3OMods()
2982 bool AMDGPUDAGToDAGISel::SelectVOP3PMods(SDValue In, SDValue &Src,  in SelectVOP3PMods()
3082 bool AMDGPUDAGToDAGISel::SelectVOP3PModsDOT(SDValue In, SDValue &Src,  in SelectVOP3PModsDOT()
3087 bool AMDGPUDAGToDAGISel::SelectVOP3PModsNeg(SDValue In, SDValue &Src) const {  in SelectVOP3PModsNeg()
3102 bool AMDGPUDAGToDAGISel::SelectWMMAOpSelVOP3PMods(SDValue In,  in SelectWMMAOpSelVOP3PMods()
3230 bool AMDGPUDAGToDAGISel::SelectWMMAModsF16Neg(SDValue In, SDValue &Src,  in SelectWMMAModsF16Neg()
3277 bool AMDGPUDAGToDAGISel::SelectWMMAModsF16NegAbs(SDValue In, SDValue &Src,  in SelectWMMAModsF16NegAbs()
3326 bool AMDGPUDAGToDAGISel::SelectWMMAModsF32NegAbs(SDValue In, SDValue &Src,  in SelectWMMAModsF32NegAbs()
3355 bool AMDGPUDAGToDAGISel::SelectWMMAVISrc(SDValue In, SDValue &Src) const {  in SelectWMMAVISrc()
3415 bool AMDGPUDAGToDAGISel::SelectSWMMACIndex8(SDValue In, SDValue &Src,  in SelectSWMMACIndex8()
3434 bool AMDGPUDAGToDAGISel::SelectSWMMACIndex16(SDValue In, SDValue &Src,  in SelectSWMMACIndex16()
3453 bool AMDGPUDAGToDAGISel::SelectVOP3OpSel(SDValue In, SDValue &Src,  in SelectVOP3OpSel()
3461 bool AMDGPUDAGToDAGISel::SelectVOP3OpSelMods(SDValue In, SDValue &Src,  in SelectVOP3OpSelMods()
3469 bool AMDGPUDAGToDAGISel::SelectVOP3PMadMixModsImpl(SDValue In, SDValue &Src,  in SelectVOP3PMadMixModsImpl()
3510 bool AMDGPUDAGToDAGISel::SelectVOP3PMadMixModsExt(SDValue In, SDValue &Src,  in SelectVOP3PMadMixModsExt()
3519 bool AMDGPUDAGToDAGISel::SelectVOP3PMadMixMods(SDValue In, SDValue &Src,  in SelectVOP3PMadMixMods()
3527 SDValue AMDGPUDAGToDAGISel::getHi16Elt(SDValue In) const {  in getHi16Elt()
3549 bool AMDGPUDAGToDAGISel::isVGPRImm(const SDNode * N) const {  in isVGPRImm()
3598 bool AMDGPUDAGToDAGISel::isUniformLoad(const SDNode *N) const {  in isUniformLoad()
3618 void AMDGPUDAGToDAGISel::PostprocessISelDAG() {  in PostprocessISelDAG()
3647           ID, std::make_unique<AMDGPUDAGToDAGISel>(TM, OptLevel)) {}  in AMDGPUDAGToDAGISelLegacy()