Lines Matching refs:Pd
358 : I<(outs pprty:$Pd), (ins sve_pred_enum:$pattern),
359 asm, "\t$Pd, $pattern",
361 [(set (vt pprty:$Pd), (op sve_pred_enum:$pattern))]>, Sched<[]> {
362 bits<4> Pd;
372 let Inst{3-0} = Pd;
387 def : InstAlias<asm # "\t$Pd",
388 (!cast<Instruction>(NAME # _B) PPR8:$Pd, 0b11111), 1>;
389 def : InstAlias<asm # "\t$Pd",
390 (!cast<Instruction>(NAME # _H) PPR16:$Pd, 0b11111), 1>;
391 def : InstAlias<asm # "\t$Pd",
392 (!cast<Instruction>(NAME # _S) PPR32:$Pd, 0b11111), 1>;
393 def : InstAlias<asm # "\t$Pd",
394 (!cast<Instruction>(NAME # _D) PPR64:$Pd, 0b11111), 1>;
735 : I<(outs PPRorPNR8:$Pd), (ins),
736 asm, "\t$Pd",
739 bits<4> Pd;
747 let Inst{3-0} = Pd;
1598 : I<(outs pprty:$Pd), (ins pprty:$Pn),
1599 asm, "\t$Pd, $Pn",
1601 [(set nxv16i1:$Pd, (op nxv16i1:$Pn))]>, Sched<[]> {
1602 bits<4> Pd;
1609 let Inst{3-0} = Pd;
1843 : I<(outs PPRorPNR8:$Pd), (ins PPRorPNRAny:$Pg, PPRorPNR8:$Pn, PPRorPNR8:$Pm),
1844 asm, "\t$Pd, $Pg/z, $Pn, $Pm",
1847 bits<4> Pd;
1860 let Inst{3-0} = Pd;
1864 !strconcat(asm, "\t$Pd, $Pg, $Pn, $Pm"),
1865 !strconcat(asm, "\t$Pd, $Pg/z, $Pn, $Pm"));
5122 : I<(outs pprty:$Pd), (ins PPR3bAny:$Pg, zprty1:$Zn, zprty2:$Zm),
5123 asm, "\t$Pd, $Pg/z, $Zn, $Zm",
5126 bits<4> Pd;
5140 let Inst{3-0} = Pd;
5212 : I<(outs pprty:$Pd), (ins PPR3bAny:$Pg, zprty:$Zn, immtype:$imm5),
5213 asm, "\t$Pd, $Pg/z, $Zn, $imm5",
5216 bits<4> Pd;
5230 let Inst{3-0} = Pd;
5288 : I<(outs pprty:$Pd), (ins PPR3bAny:$Pg, zprty:$Zn, immtype:$imm7),
5289 asm, "\t$Pd, $Pg/z, $Zn, $imm7",
5292 bits<4> Pd;
5304 let Inst{3-0} = Pd;
5356 : I<(outs pprty:$Pd), (ins gprty:$Rn, gprty:$Rm),
5357 asm, "\t$Pd, $Rn, $Rm",
5359 bits<4> Pd;
5370 let Inst{3-0} = Pd;
5424 : I<(outs pprty:$Pd), (ins GPR64:$Rn, GPR64:$Rm),
5425 asm, "\t$Pd, $Rn, $Rm",
5427 bits<4> Pd;
5437 let Inst{3-0} = Pd;
5543 : I<(outs pprty:$Pd), (ins PPR3bAny:$Pg, zprty:$Zn, zprty:$Zm),
5544 asm, "\t$Pd, $Pg/z, $Zn, $Zm",
5547 bits<4> Pd;
5561 let Inst{3-0} = Pd;
5605 : I<(outs pprty:$Pd), (ins PPR3bAny:$Pg, zprty:$Zn),
5606 asm, "\t$Pd, $Pg/z, $Zn, #0.0",
5609 bits<4> Pd;
5620 let Inst{3-0} = Pd;
6735 : I<(outs pprty:$Pd), (ins pprty:$Pn, pprty:$Pm),
6736 asm, "\t$Pd, $Pn, $Pm",
6738 [(set nxv16i1:$Pd, (op nxv16i1:$Pn, nxv16i1:$Pm))]>, Sched<[]> {
6739 bits<4> Pd;
6751 let Inst{3-0} = Pd;
6772 : I<(outs PPR16:$Pd), (ins PPR8:$Pn),
6773 asm, "\t$Pd, $Pn",
6776 bits<4> Pd;
6783 let Inst{3-0} = Pd;
6797 : I<(outs PPR8:$Pd), (ins PPRAny:$Pg),
6798 asm, "\t$Pd, $Pg/z",
6800 [(set (nxv16i1 PPR8:$Pd), (op (nxv16i1 PPRAny:$Pg)))]>, Sched<[]> {
6801 bits<4> Pd;
6808 let Inst{3-0} = Pd;
6816 (outs PPR8:$Pd), (ins),
6817 asm, "\t$Pd",
6819 [(set (nxv16i1 PPR8:$Pd), (op))]>, Sched<[]> {
6820 bits<4> Pd;
6822 let Inst{3-0} = Pd;
8419 : I<(outs PPR8:$Pd), (ins PPRAny:$Pg, PPR8:$Pn, PPR8:$Pm),
8420 asm, "\t$Pd, $Pg/z, $Pn, $Pm",
8423 bits<4> Pd;
8437 let Inst{3-0} = Pd;
8484 : I<(outs PPR8:$Pd), iops,
8485 asm, "\t$Pd, $Pg"#suffix#", $Pn",
8488 bits<4> Pd;
8498 let Inst{3-0} = Pd;
8500 let Constraints = !if(!eq (opc{0}, 1), "$Pd = $_Pd", "");
8523 : I<(outs pprty:$Pd), (ins PPR3bAny:$Pg, zprty:$Zn, zprty:$Zm),
8524 asm, "\t$Pd, $Pg/z, $Zn, $Zm",
8527 bits<4> Pd;
8539 let Inst{3-0} = Pd;
9240 : I<(outs pprty:$Pd), (ins PNRAny_p8to15:$PNn, idxty:$index),
9241 mnemonic, "\t$Pd, $PNn$index",
9243 bits<4> Pd;
9252 let Inst{3-0} = Pd;
9673 : I<(outs ppr_ty:$Pd), (ins GPR64:$Rn, GPR64:$Rm),
9674 mnemonic, "\t$Pd, $Rn, $Rm",
9676 bits<3> Pd;
9687 let Inst{3-1} = Pd;
9975 : I<(outs ppr_ty:$Pd), (ins ZPRAny:$Zn, itype:$index),
9976 mnemonic, "\t$Pd, $Zn$index",
9978 bits<4> Pd;
9987 let Inst{3-0} = Pd;
10008 def : InstAlias<mnemonic # "\t$Pd, $Zn",
10009 (!cast<Instruction>(NAME # _B) PPR8:$Pd, ZPRAny:$Zn, 0), 1>;
10010 def : InstAlias<mnemonic # "\t$Pd, $Zn",
10011 (!cast<Instruction>(NAME # _H) PPR16:$Pd, ZPRAny:$Zn, 0), 0>;
10012 def : InstAlias<mnemonic # "\t$Pd, $Zn",
10013 (!cast<Instruction>(NAME # _S) PPR32:$Pd, ZPRAny:$Zn, 0), 0>;
10014 def : InstAlias<mnemonic # "\t$Pd, $Zn",
10015 (!cast<Instruction>(NAME # _D) PPR64:$Pd, ZPRAny:$Zn, 0), 0>;