Lines Matching full:tile

61     : Pseudo<(outs), (ins i32imm:$tile, PPR3bAny:$pn, PPR3bAny:$pm,
102 …Pseudo<(outs), (ins tile_imm:$tile, MatrixIndexGPR32Op12_15:$Rs, imm_ty:$imm, multi_vector_ty:$Zn)…
116 … Pseudo<(outs vector_ty:$Zn), (ins tile_imm:$tile, MatrixIndexGPR32Op12_15:$Rs, imm_ty:$imm), []> {
207 …: Pat<(intrinsic tile_imm:$tile, (i32 (tileslice MatrixIndexGPR32Op12_15:$base, index_ty:$offset))…
208 …(!cast<Instruction>(name # _PSEUDO) $tile, $base, $offset, (REG_SEQUENCE ZPR2Mul2, vt:$Zn1, zsub0,…
211 …: Pat<(intrinsic tile_imm:$tile, (i32 (tileslice MatrixIndexGPR32Op12_15:$base, index_ty:$offset))…
212 …(!cast<Instruction>(name # _PSEUDO) $tile, $base, $offset, (REG_SEQUENCE ZPR4Mul4, vt:$Zn1, zsub0,…
219 …: Pat<(out_vt (intrinsic tile_imm:$tile, (i32 (tileslice MatrixIndexGPR32Op12_15:$base, index_ty:$…
220           (!cast<Instruction>(name # _PSEUDO) $tile, $base, $offset)>;
227     : Pat<(intrinsic imm_ty:$tile, (pg_ty PPR3bAny:$Pn), (pg_ty PPR3bAny:$Pm), vt:$Zn, vt:$Zm),
228           (!cast<Instruction>(name # _PSEUDO) $tile, $Pn, $Pm, $Zn, $Zm)>;
437 // SME Add Vector to Tile
463              (ins i32imm:$tile, PPR3bAny:$Pn, PPR3bAny:$Pm, zpr_ty:$Zn), []>,
479   def : Pat<(op timm32_0_3:$tile, (nxv4i1 PPR3bAny:$pn), (nxv4i1 PPR3bAny:$pm),
481           (!cast<Instruction>(NAME # _PSEUDO_S) timm32_0_3:$tile, $pn, $pm, $zn)>;
493   def : Pat<(op timm32_0_7:$tile, (nxv2i1 PPR3bAny:$pn), (nxv2i1 PPR3bAny:$pm),
495             (!cast<Instruction>(NAME # _PSEUDO_D) timm32_0_7:$tile, $pn, $pm, $zn)>;
574   def : Pat<(Load PPR3bAny:$pg, GPR64sp:$base, tile_ty:$tile,
576             (Inst tile_ty:$tile, $idx, $imm, $pg, $base, XZR)>;
581                     tile_ty:$tile, (i32 (tileslice MatrixIndexGPR32Op12_15:$idx,
583               (Inst tile_ty:$tile, $idx, $imm, $pg, $base, $offset)>;
588     : Pseudo<(outs), (ins i32imm:$tile, MatrixIndexGPR32Op12_15:$idx,
637   // tile registers.
721   def : Pat<(Store PPR3bAny:$pg, GPR64sp:$base, (imm2tile untyped:$tile),
723             (Inst $tile, $idx, $imm, $pg, $base, XZR)>;
728                      (imm2tile untyped:$tile),
730               (Inst $tile, $idx, $imm, $pg, $base, $offset)>;
913   def : Pat<(op imm_ty:$tile, (i32 (tileslice MatrixIndexGPR32Op12_15:$idx,
916             (inst imm_ty:$tile, $idx, $imm, $pg, $zn)>;
920     : Pseudo<(outs), (ins i32imm:$tile, MatrixIndexGPR32Op12_15:$idx,
973   // tile registers.
1103                         (imm2tile untyped:$tile), MatrixIndexGPR32Op12_15:$idx)),
1104             (inst $passthru, $pg, $tile, $idx, 0)>;
1107                           (imm2tile untyped:$tile),
1110               (inst $passthru, $pg, $tile, $idx, $imm)>;
1235 // the tile registers being zeroed. We fix this up in a custom inserter that
3238   def : Pat<(op (imm_to_zt untyped:$tile), GPR64sp:$base),
3239             (!cast<Instruction>(NAME # _PSEUDO) $tile, $base)>;
3483 // SME2 move vector to tile, two registers
3647 // SME2 move vector to tile, four registers
4110 // SME2 move tile to vector, two registers
4117 // SME2p1 move tile to vector and zero tile, two registers
4253 // SME2 move tile to vector, four registers
4259 // SME2p1 move tile to vector and zero tile, four registers