Lines Matching refs:Rd
1180 def SPACE : Pseudo<(outs GPR64:$Rd), (ins i32imm:$size, GPR64:$Rn),
1181 [(set GPR64:$Rd, (int_aarch64_space imm:$size, GPR64:$Rn))]>,
1383 (v2f32 V64:$Rd), (v4bf16 V64:$Rn),
1391 (BF16DOTlanev4bf16 (v2f32 V64:$Rd), (v4bf16 V64:$Rn),
1420 (AccumType (int_aarch64_neon_usdot (AccumType RegType:$Rd),
1598 def : Pat<(ty (int_aarch64_neon_vcmla_rot0 (ty Reg:$Rd), (ty Reg:$Rn), (ty Reg:$Rm))),
1599 (!cast<Instruction>("FCMLA" # ty) $Rd, $Rn, $Rm, 0)>;
1600 def : Pat<(ty (int_aarch64_neon_vcmla_rot90 (ty Reg:$Rd), (ty Reg:$Rn), (ty Reg:$Rm))),
1601 (!cast<Instruction>("FCMLA" # ty) $Rd, $Rn, $Rm, 1)>;
1602 def : Pat<(ty (int_aarch64_neon_vcmla_rot180 (ty Reg:$Rd), (ty Reg:$Rn), (ty Reg:$Rm))),
1603 (!cast<Instruction>("FCMLA" # ty) $Rd, $Rn, $Rm, 2)>;
1604 def : Pat<(ty (int_aarch64_neon_vcmla_rot270 (ty Reg:$Rd), (ty Reg:$Rn), (ty Reg:$Rm))),
1605 (!cast<Instruction>("FCMLA" # ty) $Rd, $Rn, $Rm, 3)>;
1609 def : Pat<(ty (int_aarch64_neon_vcmla_rot0 (ty Reg:$Rd), (ty Reg:$Rn), RHSDup)),
1610 (!cast<Instruction>("FCMLA" # ty # "_indexed") $Rd, $Rn, $Rm, VectorIndexS:$idx, 0)>;
1611 def : Pat<(ty (int_aarch64_neon_vcmla_rot90 (ty Reg:$Rd), (ty Reg:$Rn), RHSDup)),
1612 (!cast<Instruction>("FCMLA" # ty # "_indexed") $Rd, $Rn, $Rm, VectorIndexS:$idx, 1)>;
1613 def : Pat<(ty (int_aarch64_neon_vcmla_rot180 (ty Reg:$Rd), (ty Reg:$Rn), RHSDup)),
1614 (!cast<Instruction>("FCMLA" # ty # "_indexed") $Rd, $Rn, $Rm, VectorIndexS:$idx, 2)>;
1615 def : Pat<(ty (int_aarch64_neon_vcmla_rot270 (ty Reg:$Rd), (ty Reg:$Rn), RHSDup)),
1616 (!cast<Instruction>("FCMLA" # ty # "_indexed") $Rd, $Rn, $Rm, VectorIndexS:$idx, 3)>;
1738 def : Pat<(int_ptrauth_strip GPR64:$Rd, 0), (XPACI GPR64:$Rd)>;
1739 def : Pat<(int_ptrauth_strip GPR64:$Rd, 1), (XPACI GPR64:$Rd)>;
1742 def : Pat<(int_ptrauth_strip GPR64:$Rd, 2), (XPACD GPR64:$Rd)>;
1743 def : Pat<(int_ptrauth_strip GPR64:$Rd, 3), (XPACD GPR64:$Rd)>;
1961 [(set GPR32:$Rd,
2127 def : InstAlias<"movz $Rd, $sym", (MOVZXi GPR64:$Rd, movw_symbol_g3:$sym, 48)>;
2128 def : InstAlias<"movz $Rd, $sym", (MOVZXi GPR64:$Rd, movw_symbol_g2:$sym, 32)>;
2129 def : InstAlias<"movz $Rd, $sym", (MOVZXi GPR64:$Rd, movw_symbol_g1:$sym, 16)>;
2130 def : InstAlias<"movz $Rd, $sym", (MOVZXi GPR64:$Rd, movw_symbol_g0:$sym, 0)>;
2132 def : InstAlias<"movn $Rd, $sym", (MOVNXi GPR64:$Rd, movw_symbol_g3:$sym, 48)>;
2133 def : InstAlias<"movn $Rd, $sym", (MOVNXi GPR64:$Rd, movw_symbol_g2:$sym, 32)>;
2134 def : InstAlias<"movn $Rd, $sym", (MOVNXi GPR64:$Rd, movw_symbol_g1:$sym, 16)>;
2135 def : InstAlias<"movn $Rd, $sym", (MOVNXi GPR64:$Rd, movw_symbol_g0:$sym, 0)>;
2137 def : InstAlias<"movk $Rd, $sym", (MOVKXi GPR64:$Rd, movw_symbol_g3:$sym, 48), 0>;
2138 def : InstAlias<"movk $Rd, $sym", (MOVKXi GPR64:$Rd, movw_symbol_g2:$sym, 32), 0>;
2139 def : InstAlias<"movk $Rd, $sym", (MOVKXi GPR64:$Rd, movw_symbol_g1:$sym, 16), 0>;
2140 def : InstAlias<"movk $Rd, $sym", (MOVKXi GPR64:$Rd, movw_symbol_g0:$sym, 0), 0>;
2142 def : InstAlias<"movz $Rd, $sym", (MOVZWi GPR32:$Rd, movw_symbol_g1:$sym, 16)>;
2143 def : InstAlias<"movz $Rd, $sym", (MOVZWi GPR32:$Rd, movw_symbol_g0:$sym, 0)>;
2145 def : InstAlias<"movn $Rd, $sym", (MOVNWi GPR32:$Rd, movw_symbol_g1:$sym, 16)>;
2146 def : InstAlias<"movn $Rd, $sym", (MOVNWi GPR32:$Rd, movw_symbol_g0:$sym, 0)>;
2148 def : InstAlias<"movk $Rd, $sym", (MOVKWi GPR32:$Rd, movw_symbol_g1:$sym, 16), 0>;
2149 def : InstAlias<"movk $Rd, $sym", (MOVKWi GPR32:$Rd, movw_symbol_g0:$sym, 0), 0>;
2151 // Final group of aliases covers true "mov $Rd, $imm" cases.
2165 def : InstAlias<"mov $Rd, $imm",
2166 (INST GPR:$Rd, !cast<Operand>(NAME # "_movimm"):$imm, shift)>;
2677 : Pseudo<(outs GPR64sp:$Rd), (ins GPR64sp:$Rsp, GPR64:$Rm), []>,
2680 : Pseudo<(outs GPR64sp:$Rd), (ins GPR64sp:$Rn, uimm6s16:$imm6, GPR64sp:$Rm, imm0_15:$imm4), []>,
2819 def : InstAlias<"rev64 $Rd, $Rn", (REVXr GPR64:$Rd, GPR64:$Rn), 0>;
4877 def FMOVH0 : Pseudo<(outs FPR16:$Rd), (ins), [(set f16:$Rd, (fpimm0))]>,
4879 def FMOVS0 : Pseudo<(outs FPR32:$Rd), (ins), [(set f32:$Rd, (fpimm0))]>,
4881 def FMOVD0 : Pseudo<(outs FPR64:$Rd), (ins), [(set f64:$Rd, (fpimm0))]>,
4886 def : InstAlias<"fmov $Rd, #0.0", (FMOVWHr FPR16:$Rd, WZR), 0>,
4889 def : InstAlias<"fmov $Rd, #0.0", (FMOVWSr FPR32:$Rd, WZR), 0>;
4890 def : InstAlias<"fmov $Rd, #0.0", (FMOVXDr FPR64:$Rd, XZR), 0>;
5122 def F128CSEL : Pseudo<(outs FPR128:$Rd),
5124 [(set (f128 FPR128:$Rd),
5270 def : Pat<(concat_vectors V64:$Rd,
5272 (FCVTNv8i16 (INSERT_SUBREG (IMPLICIT_DEF), V64:$Rd, dsub), V128:$Rn)>;
5277 def : Pat<(concat_vectors V64:$Rd, (v2f32 (any_fpround (v2f64 V128:$Rn)))),
5278 (FCVTNv4i32 (INSERT_SUBREG (IMPLICIT_DEF), V64:$Rd, dsub), V128:$Rn)>;
5279 def : Pat<(concat_vectors V64:$Rd, (v4f16 (any_fpround (v4f32 V128:$Rn)))),
5280 (FCVTNv8i16 (INSERT_SUBREG (IMPLICIT_DEF), V64:$Rd, dsub), V128:$Rn)>;
5614 def : Pat<(AArch64bsp (v8i8 V64:$Rd), V64:$Rn, V64:$Rm),
5615 (BSPv8i8 V64:$Rd, V64:$Rn, V64:$Rm)>;
5616 def : Pat<(AArch64bsp (v4i16 V64:$Rd), V64:$Rn, V64:$Rm),
5617 (BSPv8i8 V64:$Rd, V64:$Rn, V64:$Rm)>;
5618 def : Pat<(AArch64bsp (v2i32 V64:$Rd), V64:$Rn, V64:$Rm),
5619 (BSPv8i8 V64:$Rd, V64:$Rn, V64:$Rm)>;
5620 def : Pat<(AArch64bsp (v1i64 V64:$Rd), V64:$Rn, V64:$Rm),
5621 (BSPv8i8 V64:$Rd, V64:$Rn, V64:$Rm)>;
5623 def : Pat<(AArch64bsp (v16i8 V128:$Rd), V128:$Rn, V128:$Rm),
5624 (BSPv16i8 V128:$Rd, V128:$Rn, V128:$Rm)>;
5625 def : Pat<(AArch64bsp (v8i16 V128:$Rd), V128:$Rn, V128:$Rm),
5626 (BSPv16i8 V128:$Rd, V128:$Rn, V128:$Rm)>;
5627 def : Pat<(AArch64bsp (v4i32 V128:$Rd), V128:$Rn, V128:$Rm),
5628 (BSPv16i8 V128:$Rd, V128:$Rn, V128:$Rm)>;
5629 def : Pat<(AArch64bsp (v2i64 V128:$Rd), V128:$Rn, V128:$Rm),
5630 (BSPv16i8 V128:$Rd, V128:$Rn, V128:$Rm)>;
5953 def : Pat<(i32 (int_aarch64_neon_sqrdmlah (i32 FPR32:$Rd), (i32 FPR32:$Rn),
5955 (SQRDMLAHv1i32 FPR32:$Rd, FPR32:$Rn, FPR32:$Rm)>;
5956 def : Pat<(i32 (int_aarch64_neon_sqrdmlsh (i32 FPR32:$Rd), (i32 FPR32:$Rn),
5958 (SQRDMLSHv1i32 FPR32:$Rd, FPR32:$Rn, FPR32:$Rm)>;
6002 def : Pat<(i64 (int_aarch64_neon_sqadd (i64 FPR64:$Rd),
6005 (SQDMLALi32 FPR64:$Rd, FPR32:$Rn, FPR32:$Rm)>;
6006 def : Pat<(i64 (int_aarch64_neon_sqsub (i64 FPR64:$Rd),
6009 (SQDMLSLi32 FPR64:$Rd, FPR32:$Rn, FPR32:$Rm)>;
6420 def : Pat<(concat_vectors (v8i8 V64:$Rd),
6423 (ADDHNv8i16_v16i8 (SUBREG_TO_REG (i32 0), V64:$Rd, dsub),
6425 def : Pat<(concat_vectors (v4i16 V64:$Rd),
6428 (ADDHNv4i32_v8i16 (SUBREG_TO_REG (i32 0), V64:$Rd, dsub),
6430 def : Pat<(concat_vectors (v2i32 V64:$Rd),
6433 (ADDHNv2i64_v4i32 (SUBREG_TO_REG (i32 0), V64:$Rd, dsub),
6445 def : Pat<(concat_vectors (v8i8 V64:$Rd),
6448 (SUBHNv8i16_v16i8 (SUBREG_TO_REG (i32 0), V64:$Rd, dsub),
6450 def : Pat<(concat_vectors (v4i16 V64:$Rd),
6453 (SUBHNv4i32_v8i16 (SUBREG_TO_REG (i32 0), V64:$Rd, dsub),
6455 def : Pat<(concat_vectors (v2i32 V64:$Rd),
6458 (SUBHNv2i64_v4i32 (SUBREG_TO_REG (i32 0), V64:$Rd, dsub),
6578 def : Pat<(v8i8 (int_aarch64_neon_tbx1 (v8i8 V64:$Rd),
6580 (TBXv8i8One V64:$Rd, VecListOne128:$Rn, V64:$Ri)>;
6581 def : Pat<(v16i8 (int_aarch64_neon_tbx1 (v16i8 V128:$Rd),
6583 (TBXv16i8One V128:$Rd, V128:$Ri, V128:$Rn)>;
7093 def : Pat<(DstTy (concat_vectors (SrcTy V64:$Rd), V64:$Rn)),
7094 (INSvi64lane (INSERT_SUBREG (IMPLICIT_DEF), V64:$Rd, dsub), 1,
7517 [(set (v2f64 V128:$Rd), (AArch64fmov imm0_255:$imm8))]>;
7520 [(set (v2f32 V64:$Rd), (AArch64fmov imm0_255:$imm8))]>;
7523 [(set (v4f32 V128:$Rd), (AArch64fmov imm0_255:$imm8))]>;
7527 [(set (v4f16 V64:$Rd), (AArch64fmov imm0_255:$imm8))]>;
7530 [(set (v8f16 V128:$Rd), (AArch64fmov imm0_255:$imm8))]>;
7538 [(set FPR64:$Rd, simdimmtype10:$imm8)]>;
7552 [(set (v2i64 V128:$Rd), (AArch64movi_edit imm0_255:$imm8))]>;
7620 [(set (v2i32 V64:$Rd),
7623 [(set (v4i32 V128:$Rd),
7629 [(set (v8i8 V64:$Rd), (AArch64movi imm0_255:$imm8))]>;
7633 [(set (v16i8 V128:$Rd), (AArch64movi imm0_255:$imm8))]>;
7666 [(set (v2i32 V64:$Rd),
7669 [(set (v4i32 V128:$Rd),
7704 def : Pat<(v2f32 (OpNode (v2f32 V64:$Rd), (v2f32 V64:$Rn),
7707 (FMLSv2i32_indexed V64:$Rd, V64:$Rn, V128:$Rm, VectorIndexS:$idx)>;
7708 def : Pat<(v2f32 (OpNode (v2f32 V64:$Rd), (v2f32 V64:$Rn),
7714 (FMLSv2i32_indexed V64:$Rd, V64:$Rn,
7717 def : Pat<(v2f32 (OpNode (v2f32 V64:$Rd), (v2f32 V64:$Rn),
7719 (FMLSv2i32_indexed V64:$Rd, V64:$Rn,
7724 def : Pat<(v4f32 (OpNode (v4f32 V128:$Rd), (v4f32 V128:$Rn),
7727 (FMLSv4i32_indexed V128:$Rd, V128:$Rn, V128:$Rm,
7729 def : Pat<(v4f32 (OpNode (v4f32 V128:$Rd), (v4f32 V128:$Rn),
7735 (FMLSv4i32_indexed V128:$Rd, V128:$Rn,
7738 def : Pat<(v4f32 (OpNode (v4f32 V128:$Rd), (v4f32 V128:$Rn),
7740 (FMLSv4i32_indexed V128:$Rd, V128:$Rn,
7745 def : Pat<(v2f64 (OpNode (v2f64 V128:$Rd), (v2f64 V128:$Rn),
7749 V128:$Rd, V128:$Rn, V128:$Rm, VectorIndexS:$idx)>;
7750 def : Pat<(v2f64 (OpNode (v2f64 V128:$Rd), (v2f64 V128:$Rn),
7752 (FMLSv2i64_indexed V128:$Rd, V128:$Rn,
7756 def : Pat<(f32 (OpNode (f32 FPR32:$Rd), (f32 FPR32:$Rn),
7759 (FMLSv1i32_indexed FPR32:$Rd, FPR32:$Rn,
7761 def : Pat<(f32 (OpNode (f32 FPR32:$Rd), (f32 FPR32:$Rn),
7766 (FMLSv1i32_indexed FPR32:$Rd, FPR32:$Rn,
7770 def : Pat<(f64 (OpNode (f64 FPR64:$Rd), (f64 FPR64:$Rn),
7773 (FMLSv1i64_indexed FPR64:$Rd, FPR64:$Rn,
8004 def : Pat<(v1i64 (AArch64vsli (v1i64 FPR64:$Rd), (v1i64 FPR64:$Rn),
8006 (SLId FPR64:$Rd, FPR64:$Rn, vecshiftL64:$imm)>;
8018 def : Pat<(v1i64 (AArch64vsri (v1i64 FPR64:$Rd), (v1i64 FPR64:$Rn),
8020 (SRId FPR64:$Rd, FPR64:$Rn, vecshiftR64:$imm)>;
8116 def : Pat<(v16i8 (concat_vectors (v8i8 V64:$Rd),
8119 (SHRNv16i8_shift (INSERT_SUBREG (IMPLICIT_DEF), V64:$Rd, dsub),
8121 def : Pat<(v8i16 (concat_vectors (v4i16 V64:$Rd),
8124 (SHRNv8i16_shift (INSERT_SUBREG (IMPLICIT_DEF), V64:$Rd, dsub),
8126 def : Pat<(v4i32 (concat_vectors (v2i32 V64:$Rd),
8129 (SHRNv4i32_shift (INSERT_SUBREG (IMPLICIT_DEF), V64:$Rd, dsub),
8493 : Pat<(vector_insert (VTy VecListOne128:$Rd),
8495 (LD1 VecListOne128:$Rd, VecIndex:$idx, GPR64sp:$Rn)>;
8516 : Pat<(vector_insert (VTy VecListOne128:$Rd),
8518 (LD1 VecListOne128:$Rd, (IdxOp VecIndex:$idx), GPR64sp:$Rn)>;
8523 : Pat<(vector_insert (VTy VecListOne64:$Rd),
8526 (LD1 (SUBREG_TO_REG (i32 0), VecListOne64:$Rd, dsub),
8563 : Pat<(vector_insert (VTy VecListOne64:$Rd),
8566 (LD1 (SUBREG_TO_REG (i32 0), VecListOne64:$Rd, dsub),
8709 def AESMCrrTied: Pseudo<(outs V128:$Rd), (ins V128:$Rn), [], "$Rn = $Rd">,
8711 def AESIMCrrTied: Pseudo<(outs V128:$Rd), (ins V128:$Rn), [], "$Rn = $Rd">,
9887 (ins GPR64common:$Rd, GPR64common:$Rs, GPR64:$Rn),
9888 [], "$Rd = $Rd_wb,$Rs = $Rs_wb,$Rn = $Rn_wb">, Sched<[]>;
9890 (ins GPR64common:$Rd, GPR64common:$Rs, GPR64:$Rn),
9891 [], "$Rd = $Rd_wb,$Rs = $Rs_wb,$Rn = $Rn_wb">, Sched<[]>;
9895 (ins GPR64common:$Rd, GPR64:$Rn, GPR64:$Rm),
9896 … [], "$Rd = $Rd_wb,$Rn = $Rn_wb,@earlyclobber $Rn_wb">, Sched<[]>;
9901 (ins GPR64common:$Rd, GPR64:$Rn, GPR64:$Rm),
9902 [], "$Rd = $Rd_wb,$Rn = $Rn_wb">, Sched<[]>;
9908 def : Pat<(int_ptrauth_blend GPR64:$Rd, imm64_0_65535:$imm),
9909 (PAUTH_BLEND GPR64:$Rd, (trunc_imm imm64_0_65535:$imm))>;
9910 def : Pat<(int_ptrauth_blend GPR64:$Rd, GPR64:$Rn),
9911 (BFMXri GPR64:$Rd, GPR64:$Rn, 16, 15)>;