301   Register Scavenged = RS->FindUnusedReg(&AArch64::GPR64RegClass);  in insertIndirectBranch()
838   if (MRI.constrainRegClass(DstReg, &AArch64::GPR64RegClass)) {  in insertSelect()
839     RC = &AArch64::GPR64RegClass;  in insertSelect()
2169             AArch64::GPR64RegClass.contains(DstReg));  in isGPRCopy()
3468     if (RC->hasSuperClassEq(&AArch64::GPR64RegClass)) {  in emitLdStWithAddr()
4755       AArch64::GPR64RegClass.contains(SrcReg)) {  in copyPhysReg()
4760   if (AArch64::GPR64RegClass.contains(DestReg) &&  in copyPhysReg()
4781     assert(AArch64::GPR64RegClass.contains(SrcReg) && "Invalid NZCV copy");  in copyPhysReg()
4790     assert(AArch64::GPR64RegClass.contains(DestReg) && "Invalid NZCV copy");  in copyPhysReg()
4880         MF.getRegInfo().constrainRegClass(SrcReg, &AArch64::GPR64RegClass);  in storeRegToStackSlot()
5054         MF.getRegInfo().constrainRegClass(DestReg, &AArch64::GPR64RegClass);  in loadRegFromStackSlot()
5374         &AArch64::GPR64RegClass);  in emitFrameOffsetAdj()
5525       MF.getRegInfo().constrainRegClass(DstReg, &AArch64::GPR64RegClass);  in foldMemoryOperandImpl()
5529       MF.getRegInfo().constrainRegClass(SrcReg, &AArch64::GPR64RegClass);  in foldMemoryOperandImpl()
5607                           FrameIndex, &AArch64::GPR64RegClass, &TRI,  in foldMemoryOperandImpl()
7022       RC = &AArch64::GPR64RegClass;  in genAlternativeCodeSequence()
7037       RC = &AArch64::GPR64RegClass;  in genAlternativeCodeSequence()
7063       RC = &AArch64::GPR64RegClass;  in genAlternativeCodeSequence()
7123       RC = &AArch64::GPR64RegClass;  in genAlternativeCodeSequence()
7147       RC = &AArch64::GPR64RegClass;  in genAlternativeCodeSequence()
7173       RC = &AArch64::GPR64RegClass;  in genAlternativeCodeSequence()
8243   for (unsigned Reg : AArch64::GPR64RegClass) {  in findRegisterToSaveLRTo()