Lines Matching full:oops
97 class Pseudo<dag oops, dag iops, list<dag> pattern, string cstr = "">
99 dag OutOperandList = oops;
113 class I<dag oops, dag iops, string asm, string operands, string cstr,
116 dag OutOperandList = oops;
1648 class BaseSystemI<bit L, dag oops, dag iops, string asm, string operands,
1650 : I<oops, iops, asm, operands, "", pattern> {
1663 class RtSystemI<bit L, dag oops, dag iops, string asm, string operands,
1665 : BaseSystemI<L, oops, iops, asm, operands, pattern>,
1672 class TMBaseSystemI<bit L, bits<4> CRm, bits<3> op2, dag oops, dag iops,
1674 : BaseSystemI<L, oops, iops, asm, operands, pattern>,
1987 class BaseBranchReg<bits<4> opc, dag oops, dag iops, string asm,
1989 : I<oops, iops, asm, operands, "", pattern>, Sched<[WriteBrReg]> {
2021 class AuthBase<bits<1> M, dag oops, dag iops, string asm, string operands,
2023 : I<oops, iops, asm, operands, "", pattern>, Sched<[]> {
2058 class BaseAuthLoad<bit M, bit W, dag oops, dag iops, string asm,
2060 : I<oops, iops, asm, operands, cstr, []>, Sched<[]> {
3599 class BaseLoadStoreUI<bits<2> sz, bit V, bits<2> opc, dag oops, dag iops,
3601 : I<oops, iops, asm, "\t$Rt, [$Rn, $offset]", "", pattern> {
4274 class BaseLoadStoreUnscale<bits<2> sz, bit V, bits<2> opc, dag oops, dag iops,
4276 : I<oops, iops, asm, "\t$Rt, [$Rn, $offset]", "", pattern> {
4360 dag oops, dag iops, string asm>
4361 : I<oops, iops, asm, "\t$Rt, [$Rn, $offset]", "", []> {
4406 class BaseLoadStorePreIdx<bits<2> sz, bit V, bits<2> opc, dag oops, dag iops,
4408 : I<oops, iops, asm, "\t$Rt, [$Rn, $offset]!", cstr, pat> {
4452 class BaseLoadStorePostIdx<bits<2> sz, bit V, bits<2> opc, dag oops, dag iops,
4454 : I<oops, iops, asm, "\t$Rt, [$Rn], $offset", cstr, pat> {
4501 class BaseLoadStorePairOffset<bits<2> opc, bit V, bit L, dag oops, dag iops,
4503 : I<oops, iops, asm, "\t$Rt, $Rt2, [$Rn, $offset]", "", []> {
4550 class BaseLoadStorePairPreIdx<bits<2> opc, bit V, bit L, dag oops, dag iops,
4552 : I<oops, iops, asm, "\t$Rt, $Rt2, [$Rn, $offset]!", "$Rn = $wback,@earlyclobber $wback", []> {
4591 class BaseLoadStorePairPostIdx<bits<2> opc, bit V, bit L, dag oops, dag iops,
4593 : I<oops, iops, asm, "\t$Rt, $Rt2, [$Rn], $offset", "$Rn = $wback,@earlyclobber $wback", []> {
4632 class BaseLoadStorePairNoAlloc<bits<2> opc, bit V, bit L, dag oops, dag iops,
4634 : I<oops, iops, asm, "\t$Rt, $Rt2, [$Rn, $offset]", "", []> {
4701 dag oops, dag iops, string asm, string operands>
4702 : I<oops, iops, asm, operands, "", []> {
4715 dag oops, dag iops, string asm, string operands>
4716 : BaseLoadStoreExclusive<sz, o2, L, o1, o0, oops, iops, asm, operands> {
4808 string asm_opnds, string cstr, dag oops, dag iops>
4809 : I<oops, iops, asm_insn, asm_opnds, cstr, []>,
4823 dag oops, dag iops>
4825 "", oops, iops> {
4848 string asm_opnds, string cstr, dag oops, dag iops>
4849 : BaseMemTag<opc1, opc2, asm_insn, asm_opnds, cstr, oops, iops> {
7340 dag oops, dag iops, string asm,
7342 : I<oops, iops, asm, "\t$Rd, $Rn, $Rm", "$Rd = $dst", pattern>,
7433 dag oops, dag iops, string asm, string cstr, list<dag> pat>
7434 : I<oops, iops, asm,
8350 class BaseSIMDModifiedImm<bit Q, bit op, bit op2, dag oops, dag iops,
8353 : I<oops, iops, asm, op_string, cstr, pattern>,
10357 string asm, dag oops, dag iops, list<dag> pattern>
10358 : I<oops, iops, asm, "\t$Vt, [$Rn]", "", pattern> {
10373 string asm, dag oops, dag iops>
10374 : I<oops, iops, asm, "\t$Vt, [$Rn], $Xm", "$Rn = $wback", []> {
10662 dag oops, dag iops, list<dag> pattern>
10663 : I<oops, iops, asm, operands, cst, pattern> {
10677 dag oops, dag iops, list<dag> pattern>
10678 : I<oops, iops, asm, operands, "$Vt = $dst," # cst, pattern> {
10815 dag oops, dag iops, list<dag> pattern>
10816 : BaseSIMDLdStSingle<L, R, opcode, asm, "\t$Vt$idx, [$Rn]", "", oops, iops,
10827 dag oops, dag iops, list<dag> pattern>
10829 oops, iops, pattern> {
10839 dag oops, dag iops>
10841 "$Rn = $wback", oops, iops, []> {
10852 dag oops, dag iops>
10854 "$Rn = $wback", oops, iops, []> {
10866 dag oops, dag iops, list<dag> pattern>
10867 : BaseSIMDLdStSingle<L, R, opcode, asm, "\t$Vt$idx, [$Rn]", "", oops, iops,
10879 dag oops, dag iops, list<dag> pattern>
10881 oops, iops, pattern> {
10893 dag oops, dag iops>
10895 "$Rn = $wback", oops, iops, []> {
10907 dag oops, dag iops>
10909 "$Rn = $wback", oops, iops, []> {
10921 dag oops, dag iops, list<dag> pattern>
10922 : BaseSIMDLdStSingle<L, R, opcode, asm, "\t$Vt$idx, [$Rn]", "", oops, iops,
10933 dag oops, dag iops, list<dag> pattern>
10935 oops, iops, pattern> {
10945 string asm, dag oops, dag iops>
10947 "$Rn = $wback", oops, iops, []> {
10958 string asm, dag oops, dag iops>
10960 "$Rn = $wback", oops, iops, []> {
10971 dag oops, dag iops, list<dag> pattern>
10972 : BaseSIMDLdStSingle<L, R, opcode, asm, "\t$Vt$idx, [$Rn]", "", oops, iops,
10983 dag oops, dag iops, list<dag> pattern>
10985 oops, iops, pattern> {
10995 string asm, dag oops, dag iops>
10997 "$Rn = $wback", oops, iops, []> {
11008 string asm, dag oops, dag iops>
11010 "$Rn = $wback", oops, iops, []> {
11568 dag oops, dag iops, list<dag> pat>
11569 : I<oops, iops, asm,
11608 string cstr, dag oops, dag iops,
11610 : I<oops, iops, asm, "{\t$Rd" # kind # ", $Rn" # kind #
11633 class BaseCryptoV82<dag oops, dag iops, string asm, string asmops, string cst,
11635 : I <oops, iops, asm, asmops, cst, pattern>, Sched<[WriteVq]> {
11658 class CryptoRRR<bits<1> op0, bits<2>op1, dag oops, dag iops, string asm,
11660 : BaseCryptoV82<oops, iops, asm , asmops, cst, []> {
11763 class BaseCASEncoding<dag oops, dag iops, string asm, string operands,
11765 : I<oops, iops, asm, operands, cstr, pattern> {
11992 dag iops, dag oops, list<dag> pat>
11993 : I<oops, iops, asm_inst, asm_ops, "", pat>,
12007 class LoadStore64B<bits<3> opc, string asm_inst, dag iops, dag oops,
12009 : LoadStore64B_base<opc, asm_inst, "\t$Rt, [$Rn]", iops, oops, pat> {
12209 class BaseLRCPC3<bits<2> size, bit V, bits<2> opc, dag oops, dag iops,
12211 : I<oops, iops, asm, operands, cstr, []>,
12230 dag oops, dag iops, string asm,
12232 : BaseLRCPC3<size, /*V*/0, opc, oops, iops, asm, operands, cstr> {
12238 class BaseLRCPC3IntegerLoadStore<bits<2> size, bits<2> opc, dag oops, dag iops,
12240 : BaseLRCPC3<size, /*V*/0, opc, oops, iops, asm, operands, cstr> {
12245 dag oops, dag iops, string asm> {
12246 def i : BaseLRCPC3<size, /*V*/1, opc, oops, iops, asm, "\t$Rt, [$Rn{, $simm}]", /*cstr*/""> {
12255 class LRCPC3NEONLdStSingle<bit L, dag oops, dag iops, string asm, string cst>
12257 "\t$Vt$Q, [$Rn]", cst, oops, iops, []>,
12304 class BaseRCWCASEncoding<dag oops, dag iops, string asm>
12305 : I<oops, iops, asm, "\t$Rs, $Rt, [$Rn]", "$out = $Rs", []>,
12332 multiclass BaseRCWCAS<dag oops, dag iops, string prefix> {
12334 def "" : BaseRCWCASEncoding<oops, iops, prefix # "">;
12336 def A : BaseRCWCASEncoding<oops, iops, prefix # "a">;
12338 def L : BaseRCWCASEncoding<oops, iops, prefix # "l">;
12340 def AL : BaseRCWCASEncoding<oops, iops, prefix # "al">;
12504 class RtSystemI128<bit L, dag oops, dag iops, string asm, string operands, list<dag> pattern = []> :
12505 RtSystemI<L, oops, iops, asm, operands, pattern> {