12541 static bool isZIP_v_undef_Mask(ArrayRef<int> M, EVT VT, unsigned &WhichResult) {  in isZIP_v_undef_Mask()  argument
12545   WhichResult = (M[0] == 0 ? 0 : 1);  in isZIP_v_undef_Mask()
12546   unsigned Idx = WhichResult * NumElts / 2;  in isZIP_v_undef_Mask()
12560 static bool isUZP_v_undef_Mask(ArrayRef<int> M, EVT VT, unsigned &WhichResult) {  in isUZP_v_undef_Mask()  argument
12562   WhichResult = (M[0] == 0 ? 0 : 1);  in isUZP_v_undef_Mask()
12564     unsigned Idx = WhichResult;  in isUZP_v_undef_Mask()
12579 static bool isTRN_v_undef_Mask(ArrayRef<int> M, EVT VT, unsigned &WhichResult) {  in isTRN_v_undef_Mask()  argument
12583   WhichResult = (M[0] == 0 ? 0 : 1);  in isTRN_v_undef_Mask()
12585     if ((M[i] >= 0 && (unsigned)M[i] != i + WhichResult) ||  in isTRN_v_undef_Mask()
12586         (M[i + 1] >= 0 && (unsigned)M[i + 1] != i + WhichResult))  in isTRN_v_undef_Mask()
13232   unsigned WhichResult;  in LowerVECTOR_SHUFFLE()  local
13233   if (isZIPMask(ShuffleMask, NumElts, WhichResult)) {  in LowerVECTOR_SHUFFLE()
13234     unsigned Opc = (WhichResult == 0) ? AArch64ISD::ZIP1 : AArch64ISD::ZIP2;  in LowerVECTOR_SHUFFLE()
13237   if (isUZPMask(ShuffleMask, NumElts, WhichResult)) {  in LowerVECTOR_SHUFFLE()
13238     unsigned Opc = (WhichResult == 0) ? AArch64ISD::UZP1 : AArch64ISD::UZP2;  in LowerVECTOR_SHUFFLE()
13241   if (isTRNMask(ShuffleMask, NumElts, WhichResult)) {  in LowerVECTOR_SHUFFLE()
13242     unsigned Opc = (WhichResult == 0) ? AArch64ISD::TRN1 : AArch64ISD::TRN2;  in LowerVECTOR_SHUFFLE()
13246   if (isZIP_v_undef_Mask(ShuffleMask, VT, WhichResult)) {  in LowerVECTOR_SHUFFLE()
13247     unsigned Opc = (WhichResult == 0) ? AArch64ISD::ZIP1 : AArch64ISD::ZIP2;  in LowerVECTOR_SHUFFLE()
13250   if (isUZP_v_undef_Mask(ShuffleMask, VT, WhichResult)) {  in LowerVECTOR_SHUFFLE()
13251     unsigned Opc = (WhichResult == 0) ? AArch64ISD::UZP1 : AArch64ISD::UZP2;  in LowerVECTOR_SHUFFLE()
13254   if (isTRN_v_undef_Mask(ShuffleMask, VT, WhichResult)) {  in LowerVECTOR_SHUFFLE()
13255     unsigned Opc = (WhichResult == 0) ? AArch64ISD::TRN1 : AArch64ISD::TRN2;  in LowerVECTOR_SHUFFLE()
28254   unsigned WhichResult;  in LowerFixedLengthVECTOR_SHUFFLEToSVE()  local
28255   if (isZIPMask(ShuffleMask, VT.getVectorNumElements(), WhichResult) &&  in LowerFixedLengthVECTOR_SHUFFLEToSVE()
28256       WhichResult == 0)  in LowerFixedLengthVECTOR_SHUFFLEToSVE()
28260   if (isTRNMask(ShuffleMask, VT.getVectorNumElements(), WhichResult)) {  in LowerFixedLengthVECTOR_SHUFFLEToSVE()
28261     unsigned Opc = (WhichResult == 0) ? AArch64ISD::TRN1 : AArch64ISD::TRN2;  in LowerFixedLengthVECTOR_SHUFFLEToSVE()
28266   if (isZIP_v_undef_Mask(ShuffleMask, VT, WhichResult) && WhichResult == 0)  in LowerFixedLengthVECTOR_SHUFFLEToSVE()
28270   if (isTRN_v_undef_Mask(ShuffleMask, VT, WhichResult)) {  in LowerFixedLengthVECTOR_SHUFFLEToSVE()
28271     unsigned Opc = (WhichResult == 0) ? AArch64ISD::TRN1 : AArch64ISD::TRN2;  in LowerFixedLengthVECTOR_SHUFFLEToSVE()
28303     if (isZIPMask(ShuffleMask, VT.getVectorNumElements(), WhichResult) &&  in LowerFixedLengthVECTOR_SHUFFLEToSVE()
28304         WhichResult != 0)  in LowerFixedLengthVECTOR_SHUFFLEToSVE()
28308     if (isUZPMask(ShuffleMask, VT.getVectorNumElements(), WhichResult)) {  in LowerFixedLengthVECTOR_SHUFFLEToSVE()
28309       unsigned Opc = (WhichResult == 0) ? AArch64ISD::UZP1 : AArch64ISD::UZP2;  in LowerFixedLengthVECTOR_SHUFFLEToSVE()
28314     if (isZIP_v_undef_Mask(ShuffleMask, VT, WhichResult) && WhichResult != 0)  in LowerFixedLengthVECTOR_SHUFFLEToSVE()
28318     if (isUZP_v_undef_Mask(ShuffleMask, VT, WhichResult)) {  in LowerFixedLengthVECTOR_SHUFFLEToSVE()
28319       unsigned Opc = (WhichResult == 0) ? AArch64ISD::UZP1 : AArch64ISD::UZP2;  in LowerFixedLengthVECTOR_SHUFFLEToSVE()