Lines Matching refs:SPLAT_VECTOR

286   case ISD::SPLAT_VECTOR:  in isZeroingInactiveLanes()
1422 setOperationAction(ISD::SPLAT_VECTOR, VT, Custom); in AArch64TargetLowering()
1445 setOperationAction(ISD::SPLAT_VECTOR, VT, Legal); in AArch64TargetLowering()
1586 setOperationAction(ISD::SPLAT_VECTOR, VT, Legal); in AArch64TargetLowering()
1663 setOperationAction(ISD::SPLAT_VECTOR, VT, Legal); in AArch64TargetLowering()
2096 setOperationAction(ISD::SPLAT_VECTOR, VT, Default); in addTypeForFixedLengthSVE()
6866 case ISD::SPLAT_VECTOR: in LowerOperation()
10721 SDValue SplatPred = DAG.getNode(ISD::SPLAT_VECTOR, DL, PredVT, CCVal); in LowerSELECT()
10732 SDValue SplatPred = DAG.getNode(ISD::SPLAT_VECTOR, DL, PredVT, SplatVal); in LowerSELECT()
13373 SDValue SplatOne = DAG.getNode(ISD::SPLAT_VECTOR, DL, MVT::nxv2i64, One); in LowerDUPQLane()
13381 SDValue SplatIdx64 = DAG.getNode(ISD::SPLAT_VECTOR, DL, MVT::nxv2i64, Idx64); in LowerDUPQLane()
14654 Op.getOpcode() != ISD::SPLAT_VECTOR && in isPow2Splat()
18866 if (N->getOpcode() == AArch64ISD::DUP || N->getOpcode() == ISD::SPLAT_VECTOR) in isConstantSplatVectorMaskForType()
18895 if (Dup.getOpcode() != ISD::SPLAT_VECTOR) in performSVEAndCombine()
18932 Dup = DAG.getNode(ISD::SPLAT_VECTOR, DL, UnpkOp->getValueType(0), in performSVEAndCombine()
19547 if (V.getOpcode() == ISD::SPLAT_VECTOR) in performExtractSubvectorCombine()
19549 return DAG.getNode(ISD::SPLAT_VECTOR, SDLoc(N), VT, V.getOperand(0)); in performExtractSubvectorCombine()
20947 SDValue Step = DAG.getNode(ISD::SPLAT_VECTOR, DL, N->getValueType(0), Op2); in LowerSVEIntrinsicIndex()
20949 SDValue Base = DAG.getNode(ISD::SPLAT_VECTOR, DL, N->getValueType(0), Op1); in LowerSVEIntrinsicIndex()
21001 Comparator.getOpcode() == ISD::SPLAT_VECTOR) { in tryConvertSVEWideCompare()
21049 SDValue Splat = DAG.getNode(ISD::SPLAT_VECTOR, DL, CmpVT, Imm); in tryConvertSVEWideCompare()
21331 return DAG.getNode(ISD::SPLAT_VECTOR, SDLoc(N), N->getValueType(0), in performIntrinsicCombine()
24463 SDValue SplatShift = DAG.getNode(ISD::SPLAT_VECTOR, DL, MVT::nxv2i64, Shift); in getScaledOffsetForBitWidth()
25689 (ValOnlyUser->getOpcode() == ISD::SPLAT_VECTOR || in getIndexedAddressParts()
28160 DAG.getNode(ISD::SPLAT_VECTOR, DL, MaskType, VScale), in GenerateFixedLengthSVETBL()
28204 Op = DAG.getNode(ISD::SPLAT_VECTOR, DL, ContainerVT, SplatEl); in LowerFixedLengthVECTOR_SHUFFLEToSVE()