Lines Matching refs:RegVT
7349 EVT RegVT = VA.getLocVT(); in LowerFormalArguments() local
7352 if (RegVT == MVT::i32) in LowerFormalArguments()
7354 else if (RegVT == MVT::i64) in LowerFormalArguments()
7356 else if (RegVT == MVT::f16 || RegVT == MVT::bf16) in LowerFormalArguments()
7358 else if (RegVT == MVT::f32) in LowerFormalArguments()
7360 else if (RegVT == MVT::f64 || RegVT.is64BitVector()) in LowerFormalArguments()
7362 else if (RegVT == MVT::f128 || RegVT.is128BitVector()) in LowerFormalArguments()
7364 else if (RegVT.isScalableVector() && in LowerFormalArguments()
7365 RegVT.getVectorElementType() == MVT::i1) { in LowerFormalArguments()
7368 } else if (RegVT == MVT::aarch64svcount) { in LowerFormalArguments()
7371 } else if (RegVT.isScalableVector()) { in LowerFormalArguments()
7391 ArgValue = DAG.getCopyFromReg(Chain, DL, Reg, RegVT, Glue); in LowerFormalArguments()
7401 ArgValue = DAG.getCopyFromReg(Chain, DL, Reg, RegVT); in LowerFormalArguments()
7424 ArgValue = DAG.getNode(ISD::SRL, DL, RegVT, ArgValue, in LowerFormalArguments()
7425 DAG.getConstant(32, DL, RegVT)); in LowerFormalArguments()