Lines Matching refs:NewOp
13413 static SDValue tryAdvSIMDModImm64(unsigned NewOp, SDValue Op, SelectionDAG &DAG, in tryAdvSIMDModImm64() argument
13424 SDValue Mov = DAG.getNode(NewOp, dl, MovTy, in tryAdvSIMDModImm64()
13434 static SDValue tryAdvSIMDModImm32(unsigned NewOp, SDValue Op, SelectionDAG &DAG, in tryAdvSIMDModImm32() argument
13470 Mov = DAG.getNode(NewOp, dl, MovTy, in tryAdvSIMDModImm32()
13475 Mov = DAG.getNode(NewOp, dl, MovTy, in tryAdvSIMDModImm32()
13487 static SDValue tryAdvSIMDModImm16(unsigned NewOp, SDValue Op, SelectionDAG &DAG, in tryAdvSIMDModImm16() argument
13515 Mov = DAG.getNode(NewOp, dl, MovTy, in tryAdvSIMDModImm16()
13520 Mov = DAG.getNode(NewOp, dl, MovTy, in tryAdvSIMDModImm16()
13532 static SDValue tryAdvSIMDModImm321s(unsigned NewOp, SDValue Op, in tryAdvSIMDModImm321s() argument
13552 SDValue Mov = DAG.getNode(NewOp, dl, MovTy, in tryAdvSIMDModImm321s()
13563 static SDValue tryAdvSIMDModImm8(unsigned NewOp, SDValue Op, SelectionDAG &DAG, in tryAdvSIMDModImm8() argument
13574 SDValue Mov = DAG.getNode(NewOp, dl, MovTy, in tryAdvSIMDModImm8()
13584 static SDValue tryAdvSIMDModImmFP(unsigned NewOp, SDValue Op, SelectionDAG &DAG, in tryAdvSIMDModImmFP() argument
13605 SDValue Mov = DAG.getNode(NewOp, dl, MovTy, in tryAdvSIMDModImmFP()
13816 SDValue NewOp; in LowerVectorOR() local
13818 if ((NewOp = tryAdvSIMDModImm32(AArch64ISD::ORRi, Op, DAG, in LowerVectorOR()
13820 (NewOp = tryAdvSIMDModImm16(AArch64ISD::ORRi, Op, DAG, in LowerVectorOR()
13822 return NewOp; in LowerVectorOR()
13824 if ((NewOp = tryAdvSIMDModImm32(AArch64ISD::ORRi, Op, DAG, in LowerVectorOR()
13826 (NewOp = tryAdvSIMDModImm16(AArch64ISD::ORRi, Op, DAG, in LowerVectorOR()
13828 return NewOp; in LowerVectorOR()
13879 SDValue NewOp; in ConstantBuildVector() local
13880 if ((NewOp = in ConstantBuildVector()
13882 (NewOp = in ConstantBuildVector()
13884 (NewOp = in ConstantBuildVector()
13886 (NewOp = in ConstantBuildVector()
13888 (NewOp = tryAdvSIMDModImm8(AArch64ISD::MOVI, Op, DAG, DefBits)) || in ConstantBuildVector()
13889 (NewOp = tryAdvSIMDModImmFP(AArch64ISD::FMOV, Op, DAG, DefBits))) in ConstantBuildVector()
13890 return NewOp; in ConstantBuildVector()
13893 if ((NewOp = tryAdvSIMDModImm32(AArch64ISD::MVNIshift, Op, DAG, in ConstantBuildVector()
13895 (NewOp = tryAdvSIMDModImm321s(AArch64ISD::MVNImsl, Op, DAG, in ConstantBuildVector()
13897 (NewOp = in ConstantBuildVector()
13899 return NewOp; in ConstantBuildVector()
13921 if (SDValue NewOp = TryMOVIWithBits(NegBits)) { in ConstantBuildVector() local
13927 DAG.getNode(AArch64ISD::NVCAST, DL, VFVT, NewOp))); in ConstantBuildVector()
15469 unsigned NewOp) const { in LowerAVG()
15471 return LowerToPredicatedOp(Op, DAG, NewOp); in LowerAVG()
18235 SDValue NewOp = DAG.getNode(N->getOpcode(), DL, HalfVT, NewN0, NewN1); in performVectorExtCombine() local
18238 DL, VT, NewOp); in performVectorExtCombine()
19071 SDValue NewOp; in performANDCombine() local
19082 if ((NewOp = tryAdvSIMDModImm32(AArch64ISD::BICi, SDValue(N, 0), DAG, in performANDCombine()
19084 (NewOp = tryAdvSIMDModImm16(AArch64ISD::BICi, SDValue(N, 0), DAG, in performANDCombine()
19086 return NewOp; in performANDCombine()
19089 if ((NewOp = tryAdvSIMDModImm32(AArch64ISD::BICi, SDValue(N, 0), DAG, in performANDCombine()
19091 (NewOp = tryAdvSIMDModImm16(AArch64ISD::BICi, SDValue(N, 0), DAG, in performANDCombine()
19093 return NewOp; in performANDCombine()
20707 SDValue NewOp = GenCombinedTree(Op0, Op1, DAG); in performExtBinopLoadFold() local
20726 NewOp, DAG.getConstant(0, DL, MVT::i64)); in performExtBinopLoadFold()
20728 DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, Op0.getValueType(), NewOp, in performExtBinopLoadFold()
20738 SDValue Ext = DAG.getNode(Other.getOpcode(), DL, DVT, NewOp); in performExtBinopLoadFold()
22521 unsigned NewOp = IsLaneOp ? AArch64ISD::LD1LANEpost : AArch64ISD::LD1DUPpost; in performPostLD1Combine() local
22522 SDValue UpdN = DAG.getMemIntrinsicNode(NewOp, SDLoc(N), SDTys, Ops, in performPostLD1Combine()
27557 unsigned NewOp) const { in LowerToPredicatedOp()
27586 if (isMergePassthruOpcode(NewOp)) in LowerToPredicatedOp()
27589 auto ScalableRes = DAG.getNode(NewOp, DL, ContainerVT, Operands); in LowerToPredicatedOp()
27603 if (isMergePassthruOpcode(NewOp)) in LowerToPredicatedOp()
27606 return DAG.getNode(NewOp, DL, VT, Operands, Op->getFlags()); in LowerToPredicatedOp()