536   setOperationAction(ISD::FADD, MVT::f128, LibCall);  in AArch64TargetLowering()
539   setOperationAction(ISD::FDIV, MVT::f128, LibCall);  in AArch64TargetLowering()
541   setOperationAction(ISD::FMUL, MVT::f128, LibCall);  in AArch64TargetLowering()
549   setOperationAction(ISD::FSUB, MVT::f128, LibCall);  in AArch64TargetLowering()
903     setOperationAction(ISD::ATOMIC_LOAD_SUB, MVT::i32, LibCall);  in AArch64TargetLowering()
904     setOperationAction(ISD::ATOMIC_LOAD_SUB, MVT::i64, LibCall);  in AArch64TargetLowering()
915     setOperationAction(ISD::ATOMIC_CMP_SWAP, MVT::i8, LibCall);  in AArch64TargetLowering()
916     setOperationAction(ISD::ATOMIC_CMP_SWAP, MVT::i16, LibCall);  in AArch64TargetLowering()
917     setOperationAction(ISD::ATOMIC_CMP_SWAP, MVT::i32, LibCall);  in AArch64TargetLowering()
918     setOperationAction(ISD::ATOMIC_CMP_SWAP, MVT::i64, LibCall);  in AArch64TargetLowering()
919     setOperationAction(ISD::ATOMIC_CMP_SWAP, MVT::i128, LibCall);  in AArch64TargetLowering()
920     setOperationAction(ISD::ATOMIC_SWAP, MVT::i8, LibCall);  in AArch64TargetLowering()
921     setOperationAction(ISD::ATOMIC_SWAP, MVT::i16, LibCall);  in AArch64TargetLowering()
922     setOperationAction(ISD::ATOMIC_SWAP, MVT::i32, LibCall);  in AArch64TargetLowering()
923     setOperationAction(ISD::ATOMIC_SWAP, MVT::i64, LibCall);  in AArch64TargetLowering()
924     setOperationAction(ISD::ATOMIC_LOAD_ADD, MVT::i8, LibCall);  in AArch64TargetLowering()
925     setOperationAction(ISD::ATOMIC_LOAD_ADD, MVT::i16, LibCall);  in AArch64TargetLowering()
926     setOperationAction(ISD::ATOMIC_LOAD_ADD, MVT::i32, LibCall);  in AArch64TargetLowering()
927     setOperationAction(ISD::ATOMIC_LOAD_ADD, MVT::i64, LibCall);  in AArch64TargetLowering()
928     setOperationAction(ISD::ATOMIC_LOAD_OR, MVT::i8, LibCall);  in AArch64TargetLowering()
929     setOperationAction(ISD::ATOMIC_LOAD_OR, MVT::i16, LibCall);  in AArch64TargetLowering()
930     setOperationAction(ISD::ATOMIC_LOAD_OR, MVT::i32, LibCall);  in AArch64TargetLowering()
931     setOperationAction(ISD::ATOMIC_LOAD_OR, MVT::i64, LibCall);  in AArch64TargetLowering()
932     setOperationAction(ISD::ATOMIC_LOAD_CLR, MVT::i8, LibCall);  in AArch64TargetLowering()
933     setOperationAction(ISD::ATOMIC_LOAD_CLR, MVT::i16, LibCall);  in AArch64TargetLowering()
934     setOperationAction(ISD::ATOMIC_LOAD_CLR, MVT::i32, LibCall);  in AArch64TargetLowering()
935     setOperationAction(ISD::ATOMIC_LOAD_CLR, MVT::i64, LibCall);  in AArch64TargetLowering()
936     setOperationAction(ISD::ATOMIC_LOAD_XOR, MVT::i8, LibCall);  in AArch64TargetLowering()
937     setOperationAction(ISD::ATOMIC_LOAD_XOR, MVT::i16, LibCall);  in AArch64TargetLowering()
938     setOperationAction(ISD::ATOMIC_LOAD_XOR, MVT::i32, LibCall);  in AArch64TargetLowering()
939     setOperationAction(ISD::ATOMIC_LOAD_XOR, MVT::i64, LibCall);  in AArch64TargetLowering()