Lines Matching refs:IntermediateVT

28654     LLVMContext &Context, CallingConv::ID CC, EVT VT, EVT &IntermediateVT,  in getVectorTypeBreakdownForCallingConv()  argument
28657       Context, CC, VT, IntermediateVT, NumIntermediates, RegisterVT);  in getVectorTypeBreakdownForCallingConv()
28663   assert(IntermediateVT == RegisterVT && "Unexpected VT mismatch!");  in getVectorTypeBreakdownForCallingConv()
28674     IntermediateVT = NewVT;  in getVectorTypeBreakdownForCallingConv()
28691     IntermediateVT = RegisterVT = MVT::v16i8;  in getVectorTypeBreakdownForCallingConv()
28694     IntermediateVT = RegisterVT = MVT::v8i16;  in getVectorTypeBreakdownForCallingConv()
28697     IntermediateVT = RegisterVT = MVT::v4i32;  in getVectorTypeBreakdownForCallingConv()
28700     IntermediateVT = RegisterVT = MVT::v2i64;  in getVectorTypeBreakdownForCallingConv()
28703     IntermediateVT = RegisterVT = MVT::v8f16;  in getVectorTypeBreakdownForCallingConv()
28706     IntermediateVT = RegisterVT = MVT::v4f32;  in getVectorTypeBreakdownForCallingConv()
28709     IntermediateVT = RegisterVT = MVT::v2f64;  in getVectorTypeBreakdownForCallingConv()
28712     IntermediateVT = RegisterVT = MVT::v8bf16;  in getVectorTypeBreakdownForCallingConv()