Lines Matching refs:DefBits

13813   APInt DefBits(VT.getSizeInBits(), 0);  in LowerVectorOR()  local
13815 if (resolveBuildVector(BVN, DefBits, UndefBits)) { in LowerVectorOR()
13819 DefBits, &LHS)) || in LowerVectorOR()
13821 DefBits, &LHS))) in LowerVectorOR()
13874 APInt DefBits(VT.getSizeInBits(), 0); in ConstantBuildVector() local
13877 if (resolveBuildVector(BVN, DefBits, UndefBits)) { in ConstantBuildVector()
13878 auto TryMOVIWithBits = [&](APInt DefBits) { in ConstantBuildVector() argument
13881 tryAdvSIMDModImm64(AArch64ISD::MOVIedit, Op, DAG, DefBits)) || in ConstantBuildVector()
13883 tryAdvSIMDModImm32(AArch64ISD::MOVIshift, Op, DAG, DefBits)) || in ConstantBuildVector()
13885 tryAdvSIMDModImm321s(AArch64ISD::MOVImsl, Op, DAG, DefBits)) || in ConstantBuildVector()
13887 tryAdvSIMDModImm16(AArch64ISD::MOVIshift, Op, DAG, DefBits)) || in ConstantBuildVector()
13888 (NewOp = tryAdvSIMDModImm8(AArch64ISD::MOVI, Op, DAG, DefBits)) || in ConstantBuildVector()
13889 (NewOp = tryAdvSIMDModImmFP(AArch64ISD::FMOV, Op, DAG, DefBits))) in ConstantBuildVector()
13892 APInt NotDefBits = ~DefBits; in ConstantBuildVector()
13902 if (SDValue R = TryMOVIWithBits(DefBits)) in ConstantBuildVector()
13908 auto TryWithFNeg = [&](APInt DefBits, MVT FVT) { in ConstantBuildVector() argument
13917 NegBits = DefBits ^ NegBits; in ConstantBuildVector()
13932 if ((R = TryWithFNeg(DefBits, MVT::f32)) || in ConstantBuildVector()
13933 (R = TryWithFNeg(DefBits, MVT::f64)) || in ConstantBuildVector()
13934 (ST->hasFullFP16() && (R = TryWithFNeg(DefBits, MVT::f16)))) in ConstantBuildVector()
19068 APInt DefBits(VT.getSizeInBits(), 0); in performANDCombine() local
19070 if (resolveBuildVector(BVN, DefBits, UndefBits)) { in performANDCombine()
19081 DefBits = ~(DefBits | ZeroSplat); in performANDCombine()
19083 DefBits, &LHS)) || in performANDCombine()
19085 DefBits, &LHS))) in performANDCombine()