1100   setTargetDAGCombine({ISD::ANY_EXTEND, ISD::ZERO_EXTEND, ISD::SIGN_EXTEND,  in AArch64TargetLowering()
1319     setOperationAction(ISD::ANY_EXTEND, MVT::v4i32, Legal);  in AArch64TargetLowering()
2039   setOperationAction(ISD::ANY_EXTEND, VT, Default);  in addTypeForFixedLengthSVE()
4927           DAG.getNode(ISD::ANY_EXTEND, SDLoc(Op), getSVEContainerType(ArgVT),  in LowerBITCAST()
4944   Op = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i32, Op.getOperand(0));  in LowerBITCAST()
5057          N.getOpcode() == ISD::ANY_EXTEND ||  in isSignExtended()
5063          N.getOpcode() == ISD::ANY_EXTEND ||  in isZeroExtended()
5899       Scalar = DAG.getNode(ISD::ANY_EXTEND, dl, MVT::i32, Scalar);  in LowerINTRINSIC_WO_CHAIN()
6341     StoreVal = DAG.getNode(ISD::ANY_EXTEND, DL, PromotedVT, StoreVal);  in LowerMSCATTER()
6972   case ISD::ANY_EXTEND:  in LowerOperation()
8526       Arg = DAG.getNode(ISD::ANY_EXTEND, DL, VA.getLocVT(), Arg);  in LowerCall()
8530       Arg = DAG.getNode(ISD::ANY_EXTEND, DL, VA.getLocVT(), Arg);  in LowerCall()
12001     if (MaskSource.getOpcode() == ISD::ANY_EXTEND)  in ReconstructShuffleWithRuntimeMask()
14469         DAG.getNode(ISD::ANY_EXTEND, DL, VectorVT, Op.getOperand(0));  in LowerEXTRACT_VECTOR_ELT()
14616       Vec1 = DAG.getNode(ISD::ANY_EXTEND, DL, WideVT, Vec1);  in LowerINSERT_SUBVECTOR()
15214         ScalarOpcode == ISD::XOR ? ISD::ANY_EXTEND : ISD::SIGN_EXTEND;  in getVectorBitwiseReduce()
15731     if (Extract.getOpcode() == ISD::ANY_EXTEND && Extract.hasOneUse())  in shouldRemoveRedundantExtend()
20270     SDValue Ext = DAG.getNode(ISD::ANY_EXTEND, DL, ExtVT, VecToExtend);  in performBuildVectorCombine()
20611   case ISD::ANY_EXTEND:  in areLoadedOffsetButOtherwiseSame()
20959     Scalar = DAG.getNode(ISD::ANY_EXTEND, dl, MVT::i32, Scalar);  in LowerSVEIntrinsicDUP()
21771     SrcNew = DAG.getNode(ISD::ANY_EXTEND, DL, HwSrcVt, Data);  in performST1Combine()
22567         ExtOpCode != ISD::ANY_EXTEND)  in foldTruncStoreOfExt()
24078   if (Op->getOpcode() == ISD::ANY_EXTEND &&  in getTestBitOperand()
24582     Offset = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::nxv2i64, Offset).getValue(0);  in performScatterStoreCombine()
24603     SrcNew = DAG.getNode(ISD::ANY_EXTEND, DL, HwSrcVt, Src);  in performScatterStoreCombine()
24690     Offset = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::nxv2i64, Offset).getValue(0);  in performGatherLoadCombine()
24864   Offset = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::nxv2i64, Offset);  in legalizeSVEGatherPrefetchOffsVec()
25321   case ISD::ANY_EXTEND:  in PerformDAGCombine()
26336       auto Op2 = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i32, N->getOperand(2));  in ReplaceNodeResults()
26346       auto Op2 = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i32, N->getOperand(2));  in ReplaceNodeResults()
27298     Mask = DAG.getNode(ISD::ANY_EXTEND, DL, VT, Mask);  in LowerFixedLengthVectorMLoadToSVE()
27858   Val = DAG.getNode(ISD::ANY_EXTEND, DL, VT.changeTypeToInteger(), Val);  in LowerFixedLengthFPExtendToSVE()
28044     Val = DAG.getNode(ISD::ANY_EXTEND, DL, VT, Val);  in LowerFixedLengthFPToIntToSVE()