376 AArch64TargetLowering::AArch64TargetLowering(const TargetMachine &TM,  in AArch64TargetLowering()  function in AArch64TargetLowering
1829 void AArch64TargetLowering::addTypeForNEON(MVT VT) {  in addTypeForNEON()
1954 bool AArch64TargetLowering::shouldExpandGetActiveLaneMask(EVT ResVT,  in shouldExpandGetActiveLaneMask()
1974 bool AArch64TargetLowering::shouldExpandCttzElements(EVT VT) const {  in shouldExpandCttzElements()
1985 void AArch64TargetLowering::addTypeForFixedLengthSVE(MVT VT) {  in addTypeForFixedLengthSVE()
2127 void AArch64TargetLowering::addDRType(MVT VT) {  in addDRType()
2133 void AArch64TargetLowering::addQRType(MVT VT) {  in addQRType()
2139 EVT AArch64TargetLowering::getSetCCResultType(const DataLayout &,  in getSetCCResultType()
2262 bool AArch64TargetLowering::targetShrinkDemandedConstant(  in targetShrinkDemandedConstant()
2307 void AArch64TargetLowering::computeKnownBitsForTargetNode(  in computeKnownBitsForTargetNode()
2434 unsigned AArch64TargetLowering::ComputeNumSignBitsForTargetNode(  in ComputeNumSignBitsForTargetNode()
2466 MVT AArch64TargetLowering::getScalarShiftAmountTy(const DataLayout &DL,  in getScalarShiftAmountTy()
2471 bool AArch64TargetLowering::allowsMisalignedMemoryAccesses(  in allowsMisalignedMemoryAccesses()
2496 bool AArch64TargetLowering::allowsMisalignedMemoryAccesses(  in allowsMisalignedMemoryAccesses()
2522 AArch64TargetLowering::createFastISel(FunctionLoweringInfo &funcInfo,  in createFastISel()
2527 const char *AArch64TargetLowering::getTargetNodeName(unsigned Opcode) const {  in getTargetNodeName()
2863 AArch64TargetLowering::EmitF128CSEL(MachineInstr &MI,  in EmitF128CSEL()
2922 MachineBasicBlock *AArch64TargetLowering::EmitLoweredCatchRet(  in EmitLoweredCatchRet()
2931 AArch64TargetLowering::EmitDynamicProbedAlloc(MachineInstr &MI,  in EmitDynamicProbedAlloc()
2947 AArch64TargetLowering::EmitTileLoad(unsigned Opc, unsigned BaseReg,  in EmitTileLoad()
2965 AArch64TargetLowering::EmitFill(MachineInstr &MI, MachineBasicBlock *BB) const {  in EmitFill()
2980 MachineBasicBlock *AArch64TargetLowering::EmitZTInstr(MachineInstr &MI,  in EmitZTInstr()
2997 AArch64TargetLowering::EmitZAInstr(unsigned Opc, unsigned BaseReg,  in EmitZAInstr()
3031 AArch64TargetLowering::EmitZero(MachineInstr &MI, MachineBasicBlock *BB) const {  in EmitZero()
3048 AArch64TargetLowering::EmitInitTPIDR2Object(MachineInstr &MI,  in EmitInitTPIDR2Object()
3078 AArch64TargetLowering::EmitAllocateZABuffer(MachineInstr &MI,  in EmitAllocateZABuffer()
3121 MachineBasicBlock *AArch64TargetLowering::EmitInstrWithCustomInserter(  in EmitInstrWithCustomInserter()
4064 SDValue AArch64TargetLowering::LowerXOR(SDValue Op, SelectionDAG &DAG) const {  in LowerXOR()
4270 SDValue AArch64TargetLowering::LowerFP_EXTEND(SDValue Op,  in LowerFP_EXTEND()
4283 SDValue AArch64TargetLowering::LowerFP_ROUND(SDValue Op,  in LowerFP_ROUND()
4366 SDValue AArch64TargetLowering::LowerVectorFP_TO_INT(SDValue Op,  in LowerVectorFP_TO_INT()
4454 SDValue AArch64TargetLowering::LowerFP_TO_INT(SDValue Op,  in LowerFP_TO_INT()
4487 AArch64TargetLowering::LowerVectorFP_TO_INT_SAT(SDValue Op,  in LowerVectorFP_TO_INT_SAT()
4565 SDValue AArch64TargetLowering::LowerFP_TO_INT_SAT(SDValue Op,  in LowerFP_TO_INT_SAT()
4622 SDValue AArch64TargetLowering::LowerVectorXRINT(SDValue Op,  in LowerVectorXRINT()
4642 SDValue AArch64TargetLowering::LowerVectorINT_TO_FP(SDValue Op,  in LowerVectorINT_TO_FP()
4731 SDValue AArch64TargetLowering::LowerINT_TO_FP(SDValue Op,  in LowerINT_TO_FP()
4870 SDValue AArch64TargetLowering::LowerFSINCOS(SDValue Op,  in LowerFSINCOS()
4906 SDValue AArch64TargetLowering::LowerBITCAST(SDValue Op,  in LowerBITCAST()
5089 SDValue AArch64TargetLowering::LowerGET_ROUNDING(SDValue Op,  in LowerGET_ROUNDING()
5112 SDValue AArch64TargetLowering::LowerSET_ROUNDING(SDValue Op,  in LowerSET_ROUNDING()
5156 SDValue AArch64TargetLowering::LowerGET_FPMODE(SDValue Op,  in LowerGET_FPMODE()
5175 SDValue AArch64TargetLowering::LowerSET_FPMODE(SDValue Op,  in LowerSET_FPMODE()
5190 SDValue AArch64TargetLowering::LowerRESET_FPMODE(SDValue Op,  in LowerRESET_FPMODE()
5278 SDValue AArch64TargetLowering::LowerMUL(SDValue Op, SelectionDAG &DAG) const {  in LowerMUL()
5440 SDValue AArch64TargetLowering::getRuntimePStateSM(SelectionDAG &DAG,  in getRuntimePStateSM()
5542 SDValue AArch64TargetLowering::LowerINTRINSIC_VOID(SDValue Op,  in LowerINTRINSIC_VOID()
5584 SDValue AArch64TargetLowering::LowerINTRINSIC_W_CHAIN(SDValue Op,  in LowerINTRINSIC_W_CHAIN()
5617 SDValue AArch64TargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op,  in LowerINTRINSIC_WO_CHAIN()
6085 bool AArch64TargetLowering::shouldExtendGSIndex(EVT VT, EVT &EltTy) const {  in shouldExtendGSIndex()
6094 bool AArch64TargetLowering::shouldRemoveExtendFromGSIndex(SDValue Extend,  in shouldRemoveExtendFromGSIndex()
6110 bool AArch64TargetLowering::isVectorLoadExtDesirable(SDValue ExtVal) const {  in isVectorLoadExtDesirable()
6185 SDValue AArch64TargetLowering::LowerMGATHER(SDValue Op,  in LowerMGATHER()
6284 SDValue AArch64TargetLowering::LowerMSCATTER(SDValue Op,  in LowerMSCATTER()
6365 SDValue AArch64TargetLowering::LowerMLOAD(SDValue Op, SelectionDAG &DAG) const {  in LowerMLOAD()
6426 SDValue AArch64TargetLowering::LowerSTORE(SDValue Op,  in LowerSTORE()
6504 SDValue AArch64TargetLowering::LowerStore128(SDValue Op,  in LowerStore128()
6535 SDValue AArch64TargetLowering::LowerLOAD(SDValue Op,  in LowerLOAD()
6593 SDValue AArch64TargetLowering::LowerABS(SDValue Op, SelectionDAG &DAG) const {  in LowerABS()
6695 SDValue AArch64TargetLowering::LowerADJUST_TRAMPOLINE(SDValue Op,  in LowerADJUST_TRAMPOLINE()
6705 SDValue AArch64TargetLowering::LowerINIT_TRAMPOLINE(SDValue Op,  in LowerINIT_TRAMPOLINE()
6745 SDValue AArch64TargetLowering::LowerOperation(SDValue Op,  in LowerOperation()
7091 bool AArch64TargetLowering::mergeStoresAfterLegalization(EVT VT) const {  in mergeStoresAfterLegalization()
7095 bool AArch64TargetLowering::useSVEForFixedLengthVectorVT(  in useSVEForFixedLengthVectorVT()
7159 bool AArch64TargetLowering::isReassocProfitable(SelectionDAG &DAG, SDValue N0,  in isReassocProfitable()
7176 CCAssignFn *AArch64TargetLowering::CCAssignFnForCall(CallingConv::ID CC,  in CCAssignFnForCall()
7238 AArch64TargetLowering::CCAssignFnForReturn(CallingConv::ID CC) const {  in CCAssignFnForReturn()
7256 SDValue AArch64TargetLowering::LowerFormalArguments(  in LowerFormalArguments()
7708 void AArch64TargetLowering::saveVarArgRegisters(CCState &CCInfo,  in saveVarArgRegisters()
7806 SDValue AArch64TargetLowering::LowerCallResult(  in LowerCallResult()
7904 static void analyzeCallOperands(const AArch64TargetLowering &TLI,  in analyzeCallOperands()
7955 bool AArch64TargetLowering::isEligibleForTailCallOptimization(  in isEligibleForTailCallOptimization()
8111 SDValue AArch64TargetLowering::addTokenForArgument(SDValue Chain,  in addTokenForArgument()
8142 bool AArch64TargetLowering::DoesCalleeRestoreStack(CallingConv::ID CallCC,  in DoesCalleeRestoreStack()
8160 void AArch64TargetLowering::AdjustInstrPostInstrSelection(MachineInstr &MI,  in AdjustInstrPostInstrSelection()
8202 SDValue AArch64TargetLowering::changeStreamingMode(SelectionDAG &DAG, SDLoc DL,  in changeStreamingMode()
8246 AArch64TargetLowering::LowerCall(CallLoweringInfo &CLI,  in LowerCall()
9002 bool AArch64TargetLowering::CanLowerReturn(  in CanLowerReturn()
9012 AArch64TargetLowering::LowerReturn(SDValue Chain, CallingConv::ID CallConv,  in LowerReturn()
9162 SDValue AArch64TargetLowering::getTargetNode(GlobalAddressSDNode *N, EVT Ty,  in getTargetNode()
9169 SDValue AArch64TargetLowering::getTargetNode(JumpTableSDNode *N, EVT Ty,  in getTargetNode()
9175 SDValue AArch64TargetLowering::getTargetNode(ConstantPoolSDNode *N, EVT Ty,  in getTargetNode()
9182 SDValue AArch64TargetLowering::getTargetNode(BlockAddressSDNode* N, EVT Ty,  in getTargetNode()
9188 SDValue AArch64TargetLowering::getTargetNode(ExternalSymbolSDNode *N, EVT Ty,  in getTargetNode()
9196 SDValue AArch64TargetLowering::getGOT(NodeTy *N, SelectionDAG &DAG,  in getGOT()
9209 SDValue AArch64TargetLowering::getAddrLarge(NodeTy *N, SelectionDAG &DAG,  in getAddrLarge()
9225 SDValue AArch64TargetLowering::getAddr(NodeTy *N, SelectionDAG &DAG,  in getAddr()
9239 SDValue AArch64TargetLowering::getAddrTiny(NodeTy *N, SelectionDAG &DAG,  in getAddrTiny()
9248 SDValue AArch64TargetLowering::LowerGlobalAddress(SDValue Op,  in LowerGlobalAddress()
9310 AArch64TargetLowering::LowerDarwinGlobalTLSAddress(SDValue Op,  in LowerDarwinGlobalTLSAddress()
9376 SDValue AArch64TargetLowering::LowerELFTLSLocalExec(const GlobalValue *GV,  in LowerELFTLSLocalExec()
9482 SDValue AArch64TargetLowering::LowerELFTLSDescCallSeq(SDValue SymAddr,  in LowerELFTLSDescCallSeq()
9498 AArch64TargetLowering::LowerELFGlobalTLSAddress(SDValue Op,  in LowerELFGlobalTLSAddress()
9585 AArch64TargetLowering::LowerWindowsGlobalTLSAddress(SDValue Op,  in LowerWindowsGlobalTLSAddress()
9643 SDValue AArch64TargetLowering::LowerGlobalTLSAddress(SDValue Op,  in LowerGlobalTLSAddress()
9688 SDValue AArch64TargetLowering::LowerPtrAuthGlobalAddressStatically(  in LowerPtrAuthGlobalAddressStatically()
9712 AArch64TargetLowering::LowerPtrAuthGlobalAddress(SDValue Op,  in LowerPtrAuthGlobalAddress()
9801 SDValue AArch64TargetLowering::LowerBR_CC(SDValue Op, SelectionDAG &DAG) const {  in LowerBR_CC()
9938 SDValue AArch64TargetLowering::LowerFCOPYSIGN(SDValue Op,  in LowerFCOPYSIGN()
10031 SDValue AArch64TargetLowering::LowerCTPOP_PARITY(SDValue Op,  in LowerCTPOP_PARITY()
10137 SDValue AArch64TargetLowering::LowerCTTZ(SDValue Op, SelectionDAG &DAG) const {  in LowerCTTZ()
10148 SDValue AArch64TargetLowering::LowerMinMax(SDValue Op,  in LowerMinMax()
10195 SDValue AArch64TargetLowering::LowerBitreverse(SDValue Op,  in LowerBitreverse()
10309 SDValue AArch64TargetLowering::LowerSETCC(SDValue Op, SelectionDAG &DAG) const {  in LowerSETCC()
10397 SDValue AArch64TargetLowering::LowerSETCCCARRY(SDValue Op,  in LowerSETCCCARRY()
10427 SDValue AArch64TargetLowering::LowerSELECT_CC(ISD::CondCode CC, SDValue LHS,  in LowerSELECT_CC()
10653 SDValue AArch64TargetLowering::LowerVECTOR_SPLICE(SDValue Op,  in LowerVECTOR_SPLICE()
10692 SDValue AArch64TargetLowering::LowerSELECT_CC(SDValue Op,  in LowerSELECT_CC()
10703 SDValue AArch64TargetLowering::LowerSELECT(SDValue Op,  in LowerSELECT()
10783 SDValue AArch64TargetLowering::LowerJumpTable(SDValue Op,  in LowerJumpTable()
10798 SDValue AArch64TargetLowering::LowerBR_JT(SDValue Op,  in LowerBR_JT()
10841 SDValue AArch64TargetLowering::LowerBRIND(SDValue Op, SelectionDAG &DAG) const {  in LowerBRIND()
10868 SDValue AArch64TargetLowering::LowerConstantPool(SDValue Op,  in LowerConstantPool()
10885 SDValue AArch64TargetLowering::LowerBlockAddress(SDValue Op,  in LowerBlockAddress()
10920 SDValue AArch64TargetLowering::LowerDarwin_VASTART(SDValue Op,  in LowerDarwin_VASTART()
10934 SDValue AArch64TargetLowering::LowerWin64_VASTART(SDValue Op,  in LowerWin64_VASTART()
10965 SDValue AArch64TargetLowering::LowerAAPCS_VASTART(SDValue Op,  in LowerAAPCS_VASTART()
11044 SDValue AArch64TargetLowering::LowerVASTART(SDValue Op,  in LowerVASTART()
11057 SDValue AArch64TargetLowering::LowerVACOPY(SDValue Op,  in LowerVACOPY()
11077 SDValue AArch64TargetLowering::LowerVAARG(SDValue Op, SelectionDAG &DAG) const {  in LowerVAARG()
11147 SDValue AArch64TargetLowering::LowerFRAMEADDR(SDValue Op,  in LowerFRAMEADDR()
11168 SDValue AArch64TargetLowering::LowerSPONENTRY(SDValue Op,  in LowerSPONENTRY()
11183 Register AArch64TargetLowering::
11199 SDValue AArch64TargetLowering::LowerADDROFRETURNADDR(SDValue Op,  in LowerADDROFRETURNADDR()
11213 SDValue AArch64TargetLowering::LowerRETURNADDR(SDValue Op,  in LowerRETURNADDR()
11254 SDValue AArch64TargetLowering::LowerShiftParts(SDValue Op,  in LowerShiftParts()
11261 bool AArch64TargetLowering::isOffsetFoldingLegal(  in isOffsetFoldingLegal()
11268 bool AArch64TargetLowering::isFPImmLegal(const APFloat &Imm, EVT VT,  in isFPImmLegal()
11346 AArch64TargetLowering::getSqrtInputTest(SDValue Op, SelectionDAG &DAG,  in getSqrtInputTest()
11356 AArch64TargetLowering::getSqrtResultForDenormInput(SDValue Op,  in getSqrtResultForDenormInput()
11361 SDValue AArch64TargetLowering::getSqrtEstimate(SDValue Operand,  in getSqrtEstimate()
11394 SDValue AArch64TargetLowering::getRecipEstimate(SDValue Operand,  in getRecipEstimate()
11448 const char *AArch64TargetLowering::LowerXConstraint(EVT ConstraintVT) const {  in LowerXConstraint()
11562 SDValue AArch64TargetLowering::LowerAsmOutputForConstraint(  in LowerAsmOutputForConstraint()
11595 AArch64TargetLowering::ConstraintType
11596 AArch64TargetLowering::getConstraintType(StringRef Constraint) const {  in getConstraintType()
11635 AArch64TargetLowering::getSingleConstraintMatchWeight(  in getSingleConstraintMatchWeight()
11668 AArch64TargetLowering::getRegForInlineAsmConstraint(  in getRegForInlineAsmConstraint()
11774 EVT AArch64TargetLowering::getAsmOperandValueType(const DataLayout &DL,  in getAsmOperandValueType()
11785 void AArch64TargetLowering::LowerAsmOperandForConstraint(  in LowerAsmOperandForConstraint()
12044 SDValue AArch64TargetLowering::ReconstructShuffle(SDValue Op,  in ReconstructShuffle()
13120 AArch64TargetLowering::LowerZERO_EXTEND_VECTOR_INREG(SDValue Op,  in LowerZERO_EXTEND_VECTOR_INREG()
13137 SDValue AArch64TargetLowering::LowerVECTOR_SHUFFLE(SDValue Op,  in LowerVECTOR_SHUFFLE()
13313 SDValue AArch64TargetLowering::LowerSPLAT_VECTOR(SDValue Op,  in LowerSPLAT_VECTOR()
13344 SDValue AArch64TargetLowering::LowerDUPQLane(SDValue Op,  in LowerDUPQLane()
13788 SDValue AArch64TargetLowering::LowerVectorOR(SDValue Op,  in LowerVectorOR()
13941 SDValue AArch64TargetLowering::LowerBUILD_VECTOR(SDValue Op,  in LowerBUILD_VECTOR()
14386 SDValue AArch64TargetLowering::LowerCONCAT_VECTORS(SDValue Op,  in LowerCONCAT_VECTORS()
14423 SDValue AArch64TargetLowering::LowerINSERT_VECTOR_ELT(SDValue Op,  in LowerINSERT_VECTOR_ELT()
14458 AArch64TargetLowering::LowerEXTRACT_VECTOR_ELT(SDValue Op,  in LowerEXTRACT_VECTOR_ELT()
14510 SDValue AArch64TargetLowering::LowerEXTRACT_SUBVECTOR(SDValue Op,  in LowerEXTRACT_SUBVECTOR()
14563 SDValue AArch64TargetLowering::LowerINSERT_SUBVECTOR(SDValue Op,  in LowerINSERT_SUBVECTOR()
14683 SDValue AArch64TargetLowering::LowerDIV(SDValue Op, SelectionDAG &DAG) const {  in LowerDIV()
14732 bool AArch64TargetLowering::shouldExpandBuildVectorWithShuffles(  in shouldExpandBuildVectorWithShuffles()
14739 bool AArch64TargetLowering::isShuffleMaskLegal(ArrayRef<int> M, EVT VT) const {  in isShuffleMaskLegal()
14772 bool AArch64TargetLowering::isVectorClearMaskLegal(ArrayRef<int> M,  in isVectorClearMaskLegal()
14820 SDValue AArch64TargetLowering::LowerTRUNCATE(SDValue Op,  in LowerTRUNCATE()
14889 SDValue AArch64TargetLowering::LowerVectorSRA_SRL_SHL(SDValue Op,  in LowerVectorSRA_SRL_SHL()
15070 SDValue AArch64TargetLowering::LowerVSETCC(SDValue Op,  in LowerVSETCC()
15268 SDValue AArch64TargetLowering::LowerVECREDUCE(SDValue Op,  in LowerVECREDUCE()
15343 SDValue AArch64TargetLowering::LowerATOMIC_LOAD_AND(SDValue Op,  in LowerATOMIC_LOAD_AND()
15363 AArch64TargetLowering::LowerWindowsDYNAMIC_STACKALLOC(SDValue Op,  in LowerWindowsDYNAMIC_STACKALLOC()
15429 AArch64TargetLowering::LowerInlineDYNAMIC_STACKALLOC(SDValue Op,  in LowerInlineDYNAMIC_STACKALLOC()
15456 AArch64TargetLowering::LowerDYNAMIC_STACKALLOC(SDValue Op,  in LowerDYNAMIC_STACKALLOC()
15468 SDValue AArch64TargetLowering::LowerAVG(SDValue Op, SelectionDAG &DAG,  in LowerAVG()
15477 SDValue AArch64TargetLowering::LowerVSCALE(SDValue Op,  in LowerVSCALE()
15491 setInfoSVEStN(const AArch64TargetLowering &TLI, const DataLayout &DL,  in setInfoSVEStN()
15492               AArch64TargetLowering::IntrinsicInfo &Info, const CallInst &CI) {  in setInfoSVEStN()
15516 bool AArch64TargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,  in getTgtMemIntrinsic()
15692 bool AArch64TargetLowering::shouldReduceLoadWidth(SDNode *Load,  in shouldReduceLoadWidth()
15727 bool AArch64TargetLowering::shouldRemoveRedundantExtend(SDValue Extend) const {  in shouldRemoveRedundantExtend()
15743 bool AArch64TargetLowering::isTruncateFree(Type *Ty1, Type *Ty2) const {  in isTruncateFree()
15750 bool AArch64TargetLowering::isTruncateFree(EVT VT1, EVT VT2) const {  in isTruncateFree()
15761 bool AArch64TargetLowering::isProfitableToHoist(Instruction *I) const {  in isProfitableToHoist()
15787 bool AArch64TargetLowering::isZExtFree(Type *Ty1, Type *Ty2) const {  in isZExtFree()
15794 bool AArch64TargetLowering::isZExtFree(EVT VT1, EVT VT2) const {  in isZExtFree()
15802 bool AArch64TargetLowering::isZExtFree(SDValue Val, EVT VT2) const {  in isZExtFree()
15817 bool AArch64TargetLowering::isExtFreeImpl(const Instruction *Ext) const {  in isExtFreeImpl()
16018 bool AArch64TargetLowering::shouldSinkOperands(  in shouldSinkOperands()
16467 bool AArch64TargetLowering::optimizeExtendOrTruncateConversion(  in optimizeExtendOrTruncateConversion()
16584 bool AArch64TargetLowering::hasPairedLoad(EVT LoadedType,  in hasPairedLoad()
16597 unsigned AArch64TargetLowering::getNumInterleavedAccesses(  in getNumInterleavedAccesses()
16608 AArch64TargetLowering::getTargetMMOFlags(const Instruction &I) const {  in getTargetMMOFlags()
16615 bool AArch64TargetLowering::isLegalInterleavedAccessType(  in isLegalInterleavedAccessType()
16733 bool AArch64TargetLowering::lowerInterleavedLoad(  in lowerInterleavedLoad()
16907 bool AArch64TargetLowering::lowerInterleavedStore(StoreInst *SI,  in lowerInterleavedStore()
17057 bool AArch64TargetLowering::lowerDeinterleaveIntrinsicToLoad(  in lowerDeinterleaveIntrinsicToLoad()
17132 bool AArch64TargetLowering::lowerInterleaveIntrinsicToStore(  in lowerInterleaveIntrinsicToStore()
17195 EVT AArch64TargetLowering::getOptimalMemOpType(  in getOptimalMemOpType()
17225 LLT AArch64TargetLowering::getOptimalMemOpLLT(  in getOptimalMemOpLLT()
17256 bool AArch64TargetLowering::isLegalAddImmediate(int64_t Immed) const {  in isLegalAddImmediate()
17271 bool AArch64TargetLowering::isLegalAddScalableImmediate(int64_t Imm) const {  in isLegalAddScalableImmediate()
17306 bool AArch64TargetLowering::isMulAddWithConstProfitable(  in isMulAddWithConstProfitable()
17334 bool AArch64TargetLowering::isLegalICmpImmediate(int64_t Immed) const {  in isLegalICmpImmediate()
17340 bool AArch64TargetLowering::isLegalAddressingMode(const DataLayout &DL,  in isLegalAddressingMode()
17419 AArch64TargetLowering::getPreferredLargeGEPBaseOffset(int64_t MinOffset,  in getPreferredLargeGEPBaseOffset()
17430 bool AArch64TargetLowering::shouldConsiderGEPOffsetSplit() const {  in shouldConsiderGEPOffsetSplit()
17435 bool AArch64TargetLowering::isFMAFasterThanFMulAndFAdd(  in isFMAFasterThanFMulAndFAdd()
17455 bool AArch64TargetLowering::isFMAFasterThanFMulAndFAdd(const Function &F,  in isFMAFasterThanFMulAndFAdd()
17466 bool AArch64TargetLowering::generateFMAsInMachineCombiner(  in generateFMAsInMachineCombiner()
17473 AArch64TargetLowering::getScratchRegisters(CallingConv::ID) const {  in getScratchRegisters()
17483 ArrayRef<MCPhysReg> AArch64TargetLowering::getRoundingControlRegisters() const {  in getRoundingControlRegisters()
17489 AArch64TargetLowering::isDesirableToCommuteWithShift(const SDNode *N,  in isDesirableToCommuteWithShift()
17519 bool AArch64TargetLowering::isDesirableToCommuteXorWithShift(  in isDesirableToCommuteXorWithShift()
17543 bool AArch64TargetLowering::shouldFoldConstantShiftPairToMask(  in shouldFoldConstantShiftPairToMask()
17565 bool AArch64TargetLowering::shouldFoldSelectWithIdentityConstant(  in shouldFoldSelectWithIdentityConstant()
17570 bool AArch64TargetLowering::shouldConvertConstantLoadToIntImm(const APInt &Imm,  in shouldConvertConstantLoadToIntImm()
17592 bool AArch64TargetLowering::isExtractSubvectorCheap(EVT ResVT, EVT SrcVT,  in isExtractSubvectorCheap()
17937 AArch64TargetLowering::BuildSDIVPow2(SDNode *N, const APInt &Divisor,  in BuildSDIVPow2()
17967 AArch64TargetLowering::BuildSREMPow2(SDNode *N, const APInt &Divisor,  in BuildSREMPow2()
18651                                const AArch64TargetLowering &TLI) {  in tryCombineToBSL()
18830                                 const AArch64TargetLowering &TLI) {  in performORCombine()
22376                                          const AArch64TargetLowering &TLI,  in performVectorShiftCombine()
25255 SDValue AArch64TargetLowering::PerformDAGCombine(SDNode *N,  in PerformDAGCombine()
25607 bool AArch64TargetLowering::isUsedByReturnOnly(SDNode *N,  in isUsedByReturnOnly()
25644 bool AArch64TargetLowering::mayBeEmittedAsTailCall(const CallInst *CI) const {  in mayBeEmittedAsTailCall()
25648 bool AArch64TargetLowering::isIndexingLegal(MachineInstr &MI, Register Base,  in isIndexingLegal()
25661 bool AArch64TargetLowering::getIndexedAddressParts(SDNode *N, SDNode *Op,  in getIndexedAddressParts()
25711 bool AArch64TargetLowering::getPreIndexedAddressParts(SDNode *N, SDValue &Base,  in getPreIndexedAddressParts()
25732 bool AArch64TargetLowering::getPostIndexedAddressParts(  in getPostIndexedAddressParts()
25799 void AArch64TargetLowering::ReplaceBITCASTResults(  in ReplaceBITCASTResults()
25913 void AArch64TargetLowering::ReplaceExtractSubVectorResults(  in ReplaceExtractSubVectorResults()
26182 void AArch64TargetLowering::ReplaceNodeResults(  in ReplaceNodeResults()
26408 bool AArch64TargetLowering::useLoadStackGuardNode() const {  in useLoadStackGuardNode()
26414 unsigned AArch64TargetLowering::combineRepeatedFPDivisors() const {  in combineRepeatedFPDivisors()
26421 AArch64TargetLowering::getPreferredVectorAction(MVT VT) const {  in getPreferredVectorAction()
26433 bool AArch64TargetLowering::isOpSuitableForLDPSTP(const Instruction *I) const {  in isOpSuitableForLDPSTP()
26448 bool AArch64TargetLowering::isOpSuitableForLSE128(const Instruction *I) const {  in isOpSuitableForLSE128()
26470 bool AArch64TargetLowering::isOpSuitableForRCPC3(const Instruction *I) const {  in isOpSuitableForRCPC3()
26487 bool AArch64TargetLowering::shouldInsertFencesForAtomic(  in shouldInsertFencesForAtomic()
26498 bool AArch64TargetLowering::shouldInsertTrailingFenceForAtomicStore(  in shouldInsertTrailingFenceForAtomicStore()
26526 AArch64TargetLowering::shouldExpandAtomicStoreInIR(StoreInst *SI) const {  in shouldExpandAtomicStoreInIR()
26543 AArch64TargetLowering::shouldExpandAtomicLoadInIR(LoadInst *LI) const {  in shouldExpandAtomicLoadInIR()
26576 AArch64TargetLowering::shouldExpandAtomicRMWInIR(AtomicRMWInst *AI) const {  in shouldExpandAtomicRMWInIR()
26625 AArch64TargetLowering::shouldExpandAtomicCmpXchgInIR(  in shouldExpandAtomicCmpXchgInIR()
26647 Value *AArch64TargetLowering::emitLoadLinked(IRBuilderBase &Builder,  in emitLoadLinked()
26686 void AArch64TargetLowering::emitAtomicCmpXchgNoStoreLLBalance(  in emitAtomicCmpXchgNoStoreLLBalance()
26692 Value *AArch64TargetLowering::emitStoreConditional(IRBuilderBase &Builder,  in emitStoreConditional()
26730 bool AArch64TargetLowering::functionArgumentNeedsConsecutiveRegisters(  in functionArgumentNeedsConsecutiveRegisters()
26744 bool AArch64TargetLowering::shouldNormalizeToSelectSequence(LLVMContext &,  in shouldNormalizeToSelectSequence()
26759 Value *AArch64TargetLowering::getIRStackGuard(IRBuilderBase &IRB) const {  in getIRStackGuard()
26774 void AArch64TargetLowering::insertSSPDeclarations(Module &M) const {  in insertSSPDeclarations()
26795 Value *AArch64TargetLowering::getSDagStackGuard(const Module &M) const {  in getSDagStackGuard()
26802 Function *AArch64TargetLowering::getSSPStackGuardCheck(const Module &M) const {  in getSSPStackGuardCheck()
26810 AArch64TargetLowering::getSafeStackPointerLocation(IRBuilderBase &IRB) const {  in getSafeStackPointerLocation()
26825 bool AArch64TargetLowering::isMaskAndCmp0FoldingBeneficial(  in isMaskAndCmp0FoldingBeneficial()
26838 bool AArch64TargetLowering::
26852 AArch64TargetLowering::preferredShiftLegalizationStrategy(  in preferredShiftLegalizationStrategy()
26861 void AArch64TargetLowering::initializeSplitCSR(MachineBasicBlock *Entry) const {  in initializeSplitCSR()
26867 void AArch64TargetLowering::insertCopiesSplitCSR(  in insertCopiesSplitCSR()
26908 bool AArch64TargetLowering::isIntDivCheap(EVT VT, AttributeList Attr) const {  in isIntDivCheap()
26920 bool AArch64TargetLowering::preferIncOfAddToSubOfNot(EVT VT) const {  in preferIncOfAddToSubOfNot()
26925 bool AArch64TargetLowering::shouldConvertFpToSat(unsigned Op, EVT FPVT,  in shouldConvertFpToSat()
26937 AArch64TargetLowering::EmitKCFICheck(MachineBasicBlock &MBB,  in EmitKCFICheck()
26965 bool AArch64TargetLowering::enableAggressiveFMAFusion(EVT VT) const {  in enableAggressiveFMAFusion()
26970 AArch64TargetLowering::getVaListSizeInBits(const DataLayout &DL) const {  in getVaListSizeInBits()
26977 void AArch64TargetLowering::finalizeLowering(MachineFunction &MF) const {  in finalizeLowering()
27001 bool AArch64TargetLowering::needsFixedCatchObjects() const {  in needsFixedCatchObjects()
27005 bool AArch64TargetLowering::shouldLocalize(  in shouldLocalize()
27084 bool AArch64TargetLowering::fallBackToDAGISel(const Instruction &Inst) const {  in fallBackToDAGISel()
27226 SDValue AArch64TargetLowering::LowerFixedLengthVectorLoadToSVE(  in LowerFixedLengthVectorLoadToSVE()
27284 SDValue AArch64TargetLowering::LowerFixedLengthVectorMLoadToSVE(  in LowerFixedLengthVectorMLoadToSVE()
27335 SDValue AArch64TargetLowering::LowerFixedLengthVectorStoreToSVE(  in LowerFixedLengthVectorStoreToSVE()
27368 SDValue AArch64TargetLowering::LowerFixedLengthVectorMStoreToSVE(  in LowerFixedLengthVectorMStoreToSVE()
27385 SDValue AArch64TargetLowering::LowerFixedLengthVectorIntDivideToSVE(  in LowerFixedLengthVectorIntDivideToSVE()
27451 SDValue AArch64TargetLowering::LowerFixedLengthVectorIntExtendToSVE(  in LowerFixedLengthVectorIntExtendToSVE()
27487 SDValue AArch64TargetLowering::LowerFixedLengthVectorTruncateToSVE(  in LowerFixedLengthVectorTruncateToSVE()
27523 SDValue AArch64TargetLowering::LowerFixedLengthExtractVectorElt(  in LowerFixedLengthExtractVectorElt()
27536 SDValue AArch64TargetLowering::LowerFixedLengthInsertVectorElt(  in LowerFixedLengthInsertVectorElt()
27555 SDValue AArch64TargetLowering::LowerToPredicatedOp(SDValue Op,  in LowerToPredicatedOp()
27612 SDValue AArch64TargetLowering::LowerToScalableOp(SDValue Op,  in LowerToScalableOp()
27641 SDValue AArch64TargetLowering::LowerVECREDUCE_SEQ_FADD(SDValue ScalarOp,  in LowerVECREDUCE_SEQ_FADD()
27669 SDValue AArch64TargetLowering::LowerPredReductionToSVE(SDValue ReduceOp,  in LowerPredReductionToSVE()
27712 SDValue AArch64TargetLowering::LowerReductionToSVE(unsigned Opcode,  in LowerReductionToSVE()
27746 AArch64TargetLowering::LowerFixedLengthVectorSelectToSVE(SDValue Op,  in LowerFixedLengthVectorSelectToSVE()
27770 SDValue AArch64TargetLowering::LowerFixedLengthVectorSetccToSVE(  in LowerFixedLengthVectorSetccToSVE()
27795 AArch64TargetLowering::LowerFixedLengthBitcastToSVE(SDValue Op,  in LowerFixedLengthBitcastToSVE()
27809 SDValue AArch64TargetLowering::LowerFixedLengthConcatVectorsToSVE(  in LowerFixedLengthConcatVectorsToSVE()
27844 AArch64TargetLowering::LowerFixedLengthFPExtendToSVE(SDValue Op,  in LowerFixedLengthFPExtendToSVE()
27869 AArch64TargetLowering::LowerFixedLengthFPRoundToSVE(SDValue Op,  in LowerFixedLengthFPRoundToSVE()
27893 AArch64TargetLowering::LowerFixedLengthIntToFPToSVE(SDValue Op,  in LowerFixedLengthIntToFPToSVE()
27937 AArch64TargetLowering::LowerVECTOR_DEINTERLEAVE(SDValue Op,  in LowerVECTOR_DEINTERLEAVE()
27950 SDValue AArch64TargetLowering::LowerVECTOR_INTERLEAVE(SDValue Op,  in LowerVECTOR_INTERLEAVE()
27964 SDValue AArch64TargetLowering::LowerVECTOR_HISTOGRAM(SDValue Op,  in LowerVECTOR_HISTOGRAM()
28023 AArch64TargetLowering::LowerFixedLengthFPToIntToSVE(SDValue Op,  in LowerFixedLengthFPToIntToSVE()
28177 SDValue AArch64TargetLowering::LowerFixedLengthVECTOR_SHUFFLEToSVE(  in LowerFixedLengthVECTOR_SHUFFLEToSVE()
28335 SDValue AArch64TargetLowering::getSVESafeBitCast(EVT VT, SDValue Op,  in getSVESafeBitCast()
28377 bool AArch64TargetLowering::isAllActivePredicate(SelectionDAG &DAG,  in isAllActivePredicate()
28382 EVT AArch64TargetLowering::getPromotedVTForPredicate(EVT VT) const {  in getPromotedVTForPredicate()
28386 bool AArch64TargetLowering::SimplifyDemandedBitsForTargetNode(  in SimplifyDemandedBitsForTargetNode()
28466 bool AArch64TargetLowering::isTargetCanonicalConstantNode(SDValue Op) const {  in isTargetCanonicalConstantNode()
28474 bool AArch64TargetLowering::isComplexDeinterleavingSupported() const {  in isComplexDeinterleavingSupported()
28479 bool AArch64TargetLowering::isComplexDeinterleavingOperationSupported(  in isComplexDeinterleavingOperationSupported()
28511 Value *AArch64TargetLowering::createComplexDeinterleavingIR(  in createComplexDeinterleavingIR()
28609 bool AArch64TargetLowering::preferScalarizeSplat(SDNode *N) const {  in preferScalarizeSplat()
28619 unsigned AArch64TargetLowering::getMinimumJumpTableEntries() const {  in getMinimumJumpTableEntries()
28623 MVT AArch64TargetLowering::getRegisterTypeForCallingConv(LLVMContext &Context,  in getRegisterTypeForCallingConv()
28639 unsigned AArch64TargetLowering::getNumRegistersForCallingConv(  in getNumRegistersForCallingConv()
28653 unsigned AArch64TargetLowering::getVectorTypeBreakdownForCallingConv(  in getVectorTypeBreakdownForCallingConv()
28719 bool AArch64TargetLowering::hasInlineStackProbe(  in hasInlineStackProbe()
28726 void AArch64TargetLowering::verifyTargetSDNode(const SDNode *N) const {  in verifyTargetSDNode()