Lines Matching refs:SuperReg
1690 SDValue SuperReg = SDValue(Ld, 0); in SelectLoad() local
1693 CurDAG->getTargetExtractSubreg(SubRegIdx + i, dl, VT, SuperReg)); in SelectLoad()
1726 SDValue SuperReg = SDValue(Ld, 1); in SelectPostLoad() local
1728 ReplaceUses(SDValue(N, 0), SuperReg); in SelectPostLoad()
1732 CurDAG->getTargetExtractSubreg(SubRegIdx + i, dl, VT, SuperReg)); in SelectPostLoad()
1836 SDValue SuperReg = SDValue(WhilePair, 0); in SelectPExtPair() local
1840 AArch64::psub0 + I, DL, VT, SuperReg)); in SelectPExtPair()
1852 SDValue SuperReg = SDValue(WhilePair, 0); in SelectWhilePair() local
1856 AArch64::psub0 + I, DL, VT, SuperReg)); in SelectWhilePair()
1868 SDValue SuperReg = SDValue(Intrinsic, 0); in SelectCVTIntrinsic() local
1871 AArch64::zsub0 + i, DL, VT, SuperReg)); in SelectCVTIntrinsic()
1907 SDValue SuperReg = SDValue(Intrinsic, 0); in SelectDestructiveMultiIntrinsic() local
1910 AArch64::zsub0 + i, DL, VT, SuperReg)); in SelectDestructiveMultiIntrinsic()
1937 SDValue SuperReg = SDValue(Load, 0); in SelectPredicatedLoad() local
1940 AArch64::zsub0 + i, DL, VT, SuperReg)); in SelectPredicatedLoad()
1972 SDValue SuperReg = SDValue(Load, 0); in SelectContiguousMultiVectorLoad() local
1975 AArch64::zsub0 + i, DL, VT, SuperReg)); in SelectContiguousMultiVectorLoad()
2006 SDValue SuperReg = SDValue(Instruction, 0); in SelectMultiVectorLuti() local
2010 AArch64::zsub0 + I, DL, VT, SuperReg)); in SelectMultiVectorLuti()
2031 SDValue SuperReg = SDValue(Intrinsic, 0); in SelectClamp() local
2034 AArch64::zsub0 + i, DL, VT, SuperReg)); in SelectClamp()
2160 SDValue SuperReg = SDValue(Res, 0); in SelectUnaryMultiIntrinsic() local
2164 AArch64::zsub0 + I, DL, VT, SuperReg)); in SelectUnaryMultiIntrinsic()
2308 SDValue SuperReg = SDValue(Ld, 0); in SelectLoadLane() local
2314 SDValue NV = CurDAG->getTargetExtractSubreg(QSubs[i], dl, WideVT, SuperReg); in SelectLoadLane()
2356 SDValue SuperReg = SDValue(Ld, 1); in SelectPostLoadLane() local
2359 Narrow ? NarrowVector(SuperReg, *CurDAG) : SuperReg); in SelectPostLoadLane()
2366 SuperReg); in SelectPostLoadLane()