603   unsigned ShiftAmt;  in SelectArithImmed()  local
606     ShiftAmt = 0;  in SelectArithImmed()
608     ShiftAmt = 12;  in SelectArithImmed()
613   unsigned ShVal = AArch64_AM::getShifterImm(AArch64_AM::LSL, ShiftAmt);  in SelectArithImmed()
2856     uint64_t ShiftAmt = AArch64_AM::getShiftValue(ShiftTypeAndValue);  in getUsefulBitsFromOrWithShiftedReg()  local
2857     Mask <<= ShiftAmt;  in getUsefulBitsFromOrWithShiftedReg()
2859     Mask.lshrInPlace(ShiftAmt);  in getUsefulBitsFromOrWithShiftedReg()
2864     uint64_t ShiftAmt = AArch64_AM::getShiftValue(ShiftTypeAndValue);  in getUsefulBitsFromOrWithShiftedReg()  local
2865     Mask.lshrInPlace(ShiftAmt);  in getUsefulBitsFromOrWithShiftedReg()
2867     Mask <<= ShiftAmt;  in getUsefulBitsFromOrWithShiftedReg()
3761   SDValue ShiftAmt = N->getOperand(1);  in tryShiftAmountMod()  local
3766   if (ShiftAmt->getOpcode() == ISD::ZERO_EXTEND ||  in tryShiftAmountMod()
3767       ShiftAmt->getOpcode() == ISD::ANY_EXTEND)  in tryShiftAmountMod()
3768     ShiftAmt = ShiftAmt->getOperand(0);  in tryShiftAmountMod()
3770   if (ShiftAmt->getOpcode() == ISD::ADD || ShiftAmt->getOpcode() == ISD::SUB) {  in tryShiftAmountMod()
3771     SDValue Add0 = ShiftAmt->getOperand(0);  in tryShiftAmountMod()
3772     SDValue Add1 = ShiftAmt->getOperand(1);  in tryShiftAmountMod()
3779     } else if (ShiftAmt->getOpcode() == ISD::SUB &&  in tryShiftAmountMod()
3786       EVT SubVT = ShiftAmt->getValueType(0);  in tryShiftAmountMod()
3800     } else if (ShiftAmt->getOpcode() == ISD::SUB &&  in tryShiftAmountMod()
3806       EVT SubVT = ShiftAmt->getValueType(0);  in tryShiftAmountMod()
3827     if (!isOpcWithIntImmediate(ShiftAmt.getNode(), ISD::AND, MaskImm) &&  in tryShiftAmountMod()
3828         !isOpcWithIntImmediate(ShiftAmt.getNode(), AArch64ISD::ANDS, MaskImm))  in tryShiftAmountMod()
3834     NewShiftAmt = ShiftAmt->getOperand(0);  in tryShiftAmountMod()