Lines Matching defs:N
73 bool SelectArithShiftedRegister(SDValue N, SDValue &Reg, SDValue &Shift) { in SelectArithShiftedRegister()
76 bool SelectLogicalShiftedRegister(SDValue N, SDValue &Reg, SDValue &Shift) { in SelectLogicalShiftedRegister()
79 bool SelectAddrModeIndexed7S8(SDValue N, SDValue &Base, SDValue &OffImm) { in SelectAddrModeIndexed7S8()
82 bool SelectAddrModeIndexed7S16(SDValue N, SDValue &Base, SDValue &OffImm) { in SelectAddrModeIndexed7S16()
85 bool SelectAddrModeIndexed7S32(SDValue N, SDValue &Base, SDValue &OffImm) { in SelectAddrModeIndexed7S32()
88 bool SelectAddrModeIndexed7S64(SDValue N, SDValue &Base, SDValue &OffImm) { in SelectAddrModeIndexed7S64()
91 bool SelectAddrModeIndexed7S128(SDValue N, SDValue &Base, SDValue &OffImm) { in SelectAddrModeIndexed7S128()
94 bool SelectAddrModeIndexedS9S128(SDValue N, SDValue &Base, SDValue &OffImm) { in SelectAddrModeIndexedS9S128()
97 bool SelectAddrModeIndexedU6S128(SDValue N, SDValue &Base, SDValue &OffImm) { in SelectAddrModeIndexedU6S128()
100 bool SelectAddrModeIndexed8(SDValue N, SDValue &Base, SDValue &OffImm) { in SelectAddrModeIndexed8()
103 bool SelectAddrModeIndexed16(SDValue N, SDValue &Base, SDValue &OffImm) { in SelectAddrModeIndexed16()
106 bool SelectAddrModeIndexed32(SDValue N, SDValue &Base, SDValue &OffImm) { in SelectAddrModeIndexed32()
109 bool SelectAddrModeIndexed64(SDValue N, SDValue &Base, SDValue &OffImm) { in SelectAddrModeIndexed64()
112 bool SelectAddrModeIndexed128(SDValue N, SDValue &Base, SDValue &OffImm) { in SelectAddrModeIndexed128()
115 bool SelectAddrModeUnscaled8(SDValue N, SDValue &Base, SDValue &OffImm) { in SelectAddrModeUnscaled8()
118 bool SelectAddrModeUnscaled16(SDValue N, SDValue &Base, SDValue &OffImm) { in SelectAddrModeUnscaled16()
121 bool SelectAddrModeUnscaled32(SDValue N, SDValue &Base, SDValue &OffImm) { in SelectAddrModeUnscaled32()
124 bool SelectAddrModeUnscaled64(SDValue N, SDValue &Base, SDValue &OffImm) { in SelectAddrModeUnscaled64()
127 bool SelectAddrModeUnscaled128(SDValue N, SDValue &Base, SDValue &OffImm) { in SelectAddrModeUnscaled128()
131 bool SelectAddrModeIndexedUImm(SDValue N, SDValue &Base, SDValue &OffImm) { in SelectAddrModeIndexedUImm()
150 bool SelectAddrModeWRO(SDValue N, SDValue &Base, SDValue &Offset, in SelectAddrModeWRO()
156 bool SelectAddrModeXRO(SDValue N, SDValue &Base, SDValue &Offset, in SelectAddrModeXRO()
161 bool SelectExtractHigh(SDValue N, SDValue &Res) { in SelectExtractHigh()
177 bool SelectRoundingVLShr(SDValue N, SDValue &Res1, SDValue &Res2) { in SelectRoundingVLShr()
206 bool SelectDupZeroOrUndef(SDValue N) { in SelectDupZeroOrUndef()
226 bool SelectDupZero(SDValue N) { in SelectDupZero()
242 bool SelectDupNegativeZero(SDValue N) { in SelectDupNegativeZero()
255 bool SelectSVEAddSubImm(SDValue N, SDValue &Imm, SDValue &Shift) { in SelectSVEAddSubImm()
260 bool SelectSVEAddSubSSatImm(SDValue N, SDValue &Imm, SDValue &Shift) { in SelectSVEAddSubSSatImm()
265 bool SelectSVECpyDupImm(SDValue N, SDValue &Imm, SDValue &Shift) { in SelectSVECpyDupImm()
270 bool SelectSVELogicalImm(SDValue N, SDValue &Imm) { in SelectSVELogicalImm()
275 bool SelectSVEArithImm(SDValue N, SDValue &Imm) { in SelectSVEArithImm()
280 bool SelectSVEShiftImm(SDValue N, SDValue &Imm) { in SelectSVEShiftImm()
284 bool SelectSVEShiftSplatImmR(SDValue N, SDValue &Imm) { in SelectSVEShiftSplatImmR()
296 bool SelectCntImm(SDValue N, SDValue &Imm) { in SelectCntImm()
317 bool SelectEXTImm(SDValue N, SDValue &Imm) { in SelectEXTImm()
333 bool ImmToReg(SDValue N, SDValue &Imm) { in ImmToReg()
411 bool SelectSVERegRegAddrMode(SDValue N, SDValue &Base, SDValue &Offset) { in SelectSVERegRegAddrMode()
419 bool SelectSMETileSlice(SDValue N, SDValue &Vector, SDValue &Offset) { in SelectSMETileSlice()
455 bool SelectAddrModeIndexed7S(SDValue N, unsigned Size, SDValue &Base, in SelectAddrModeIndexed7S()
478 bool SelectCVTFixedPosOperand(SDValue N, SDValue &FixedPos) { in SelectCVTFixedPosOperand()
485 bool SelectCVTFixedPosRecipOperand(SDValue N, SDValue &FixedPos) { in SelectCVTFixedPosRecipOperand()
540 static bool isIntImmediate(SDValue N, uint64_t &Imm) { in isIntImmediate()
547 static bool isOpcWithIntImmediate(const SDNode *N, unsigned Opc, in isOpcWithIntImmediate()
556 static bool isIntImmediateEq(SDValue N, const uint64_t ImmExpected) { in isIntImmediateEq()
592 bool AArch64DAGToDAGISel::SelectArithImmed(SDValue N, SDValue &Val, in SelectArithImmed()
622 bool AArch64DAGToDAGISel::SelectNegArithImmed(SDValue N, SDValue &Val, in SelectNegArithImmed()
655 static AArch64_AM::ShiftExtendType getShiftTypeForNode(SDValue N) { in getShiftTypeForNode()
726 bool AArch64DAGToDAGISel::SelectShiftedRegisterFromAnd(SDValue N, SDValue &Reg, in SelectShiftedRegisterFromAnd()
805 getExtendTypeForNode(SDValue N, bool IsLoadStore = false) { in getExtendTypeForNode()
882 bool AArch64DAGToDAGISel::SelectShiftedRegister(SDValue N, bool AllowROR, in SelectShiftedRegister()
910 static SDValue narrowIfNeeded(SelectionDAG *CurDAG, SDValue N) { in narrowIfNeeded()
920 bool AArch64DAGToDAGISel::SelectRDVLImm(SDValue N, SDValue &Imm) { in SelectRDVLImm()
938 bool AArch64DAGToDAGISel::SelectArithExtendedRegister(SDValue N, SDValue &Reg, in SelectArithExtendedRegister()
965 auto isDef32 = [](SDValue N) { in SelectArithExtendedRegister()
991 bool AArch64DAGToDAGISel::SelectArithUXTXRegister(SDValue N, SDValue &Reg, in SelectArithUXTXRegister()
1018 static bool isWorthFoldingADDlow(SDValue N) { in isWorthFoldingADDlow()
1046 bool AArch64DAGToDAGISel::SelectAddrModeIndexedBitWidth(SDValue N, bool IsSignedImm, in SelectAddrModeIndexedBitWidth()
1109 bool AArch64DAGToDAGISel::SelectAddrModeIndexed(SDValue N, unsigned Size, in SelectAddrModeIndexed()
1169 bool AArch64DAGToDAGISel::SelectAddrModeUnscaled(SDValue N, unsigned Size, in SelectAddrModeUnscaled()
1191 static SDValue Widen(SelectionDAG *CurDAG, SDValue N) { in Widen()
1201 bool AArch64DAGToDAGISel::SelectExtendedSHL(SDValue N, unsigned Size, in SelectExtendedSHL()
1233 bool AArch64DAGToDAGISel::SelectAddrModeWRO(SDValue N, unsigned Size, in SelectAddrModeWRO()
1322 bool AArch64DAGToDAGISel::SelectAddrModeXRO(SDValue N, unsigned Size, in SelectAddrModeXRO()
1461 SDNode *N = in createTuple() local
1466 void AArch64DAGToDAGISel::SelectTable(SDNode *N, unsigned NumVecs, unsigned Opc, in SelectTable()
1520 void AArch64DAGToDAGISel::SelectPtrauthAuth(SDNode *N) { in SelectPtrauthAuth()
1543 void AArch64DAGToDAGISel::SelectPtrauthResign(SDNode *N) { in SelectPtrauthResign()
1577 bool AArch64DAGToDAGISel::tryIndexedLoad(SDNode *N) { in tryIndexedLoad()
1678 void AArch64DAGToDAGISel::SelectLoad(SDNode *N, unsigned NumVecs, unsigned Opc, in SelectLoad()
1707 void AArch64DAGToDAGISel::SelectPostLoad(SDNode *N, unsigned NumVecs, in SelectPostLoad()
1743 AArch64DAGToDAGISel::findAddrModeSVELoadStore(SDNode *N, unsigned Opc_rr, in findAddrModeSVELoadStore()
1826 void AArch64DAGToDAGISel::SelectPExtPair(SDNode *N, unsigned Opc) { in SelectPExtPair()
1845 void AArch64DAGToDAGISel::SelectWhilePair(SDNode *N, unsigned Opc) { in SelectWhilePair()
1861 void AArch64DAGToDAGISel::SelectCVTIntrinsic(SDNode *N, unsigned NumVecs, in SelectCVTIntrinsic()
1876 void AArch64DAGToDAGISel::SelectDestructiveMultiIntrinsic(SDNode *N, in SelectDestructiveMultiIntrinsic()
1915 void AArch64DAGToDAGISel::SelectPredicatedLoad(SDNode *N, unsigned NumVecs, in SelectPredicatedLoad()
1948 void AArch64DAGToDAGISel::SelectContiguousMultiVectorLoad(SDNode *N, in SelectContiguousMultiVectorLoad()
1983 void AArch64DAGToDAGISel::SelectFrintFromVT(SDNode *N, unsigned NumVecs, in SelectFrintFromVT()
2018 void AArch64DAGToDAGISel::SelectClamp(SDNode *N, unsigned NumVecs, in SelectClamp()
2067 void AArch64DAGToDAGISel::SelectMultiVectorMove(SDNode *N, unsigned NumVecs, in SelectMultiVectorMove()
2101 void AArch64DAGToDAGISel::SelectMultiVectorMoveZ(SDNode *N, unsigned NumVecs, in SelectMultiVectorMoveZ()
2138 void AArch64DAGToDAGISel::SelectUnaryMultiIntrinsic(SDNode *N, in SelectUnaryMultiIntrinsic()
2168 void AArch64DAGToDAGISel::SelectStore(SDNode *N, unsigned NumVecs, in SelectStore()
2188 void AArch64DAGToDAGISel::SelectPredicatedStore(SDNode *N, unsigned NumVecs, in SelectPredicatedStore()
2213 bool AArch64DAGToDAGISel::SelectAddrModeFrameIndexSVE(SDValue N, SDValue &Base, in SelectAddrModeFrameIndexSVE()
2230 void AArch64DAGToDAGISel::SelectPostStore(SDNode *N, unsigned NumVecs, in SelectPostStore()
2286 void AArch64DAGToDAGISel::SelectLoadLane(SDNode *N, unsigned NumVecs, in SelectLoadLane()
2324 void AArch64DAGToDAGISel::SelectPostLoadLane(SDNode *N, unsigned NumVecs, in SelectPostLoadLane()
2378 void AArch64DAGToDAGISel::SelectStoreLane(SDNode *N, unsigned NumVecs, in SelectStoreLane()
2406 void AArch64DAGToDAGISel::SelectPostStoreLane(SDNode *N, unsigned NumVecs, in SelectPostStoreLane()
2439 static bool isBitfieldExtractOpFromAnd(SelectionDAG *CurDAG, SDNode *N, in isBitfieldExtractOpFromAnd()
2533 static bool isBitfieldExtractOpFromSExtInReg(SDNode *N, unsigned &Opc, in isBitfieldExtractOpFromSExtInReg()
2566 static bool isSeveralBitsExtractOpFromShr(SDNode *N, unsigned &Opc, in isSeveralBitsExtractOpFromShr()
2606 static bool isBitfieldExtractOpFromShr(SDNode *N, unsigned &Opc, SDValue &Opd0, in isBitfieldExtractOpFromShr()
2673 bool AArch64DAGToDAGISel::tryBitfieldExtractOpFromSExt(SDNode *N) { in tryBitfieldExtractOpFromSExt()
2697 static bool isBitfieldExtractOp(SelectionDAG *CurDAG, SDNode *N, unsigned &Opc, in isBitfieldExtractOp()
2738 bool AArch64DAGToDAGISel::tryBitfieldExtractOp(SDNode *N) { in tryBitfieldExtractOp()
3241 static bool tryBitfieldInsertOpFromOrAndImm(SDNode *N, SelectionDAG *CurDAG) { in tryBitfieldInsertOpFromOrAndImm()
3404 static bool tryOrrWithShift(SDNode *N, SDValue OrOpd0, SDValue OrOpd1, in tryOrrWithShift()
3504 static bool tryBitfieldInsertOpFromOr(SDNode *N, const APInt &UsefulBits, in tryBitfieldInsertOpFromOr()
3678 bool AArch64DAGToDAGISel::tryBitfieldInsertOp(SDNode *N) { in tryBitfieldInsertOp()
3700 bool AArch64DAGToDAGISel::tryBitfieldInsertInZeroOp(SDNode *N) { in tryBitfieldInsertInZeroOp()
3729 bool AArch64DAGToDAGISel::tryShiftAmountMod(SDNode *N) { in tryShiftAmountMod()
3853 static bool checkCVTFixedPointOperandWithFBits(SelectionDAG *CurDAG, SDValue N, in checkCVTFixedPointOperandWithFBits()
3903 bool AArch64DAGToDAGISel::SelectCVTFixedPosOperand(SDValue N, SDValue &FixedPos, in SelectCVTFixedPosOperand()
3909 bool AArch64DAGToDAGISel::SelectCVTFixedPosRecipOperand(SDValue N, in SelectCVTFixedPosRecipOperand()
3952 bool AArch64DAGToDAGISel::tryReadRegister(SDNode *N) { in tryReadRegister()
4013 bool AArch64DAGToDAGISel::tryWriteRegister(SDNode *N) { in tryWriteRegister()
4092 bool AArch64DAGToDAGISel::SelectCMP_SWAP(SDNode *N) { in SelectCMP_SWAP()
4127 bool AArch64DAGToDAGISel::SelectSVEAddSubImm(SDValue N, MVT VT, SDValue &Imm, in SelectSVEAddSubImm()
4167 bool AArch64DAGToDAGISel::SelectSVEAddSubSSatImm(SDValue N, MVT VT, in SelectSVEAddSubSSatImm()
4217 bool AArch64DAGToDAGISel::SelectSVECpyDupImm(SDValue N, MVT VT, SDValue &Imm, in SelectSVECpyDupImm()
4257 bool AArch64DAGToDAGISel::SelectSVESignedArithImm(SDValue N, SDValue &Imm) { in SelectSVESignedArithImm()
4269 bool AArch64DAGToDAGISel::SelectSVEArithImm(SDValue N, MVT VT, SDValue &Imm) { in SelectSVEArithImm()
4297 bool AArch64DAGToDAGISel::SelectSVELogicalImm(SDValue N, MVT VT, SDValue &Imm, in SelectSVELogicalImm()
4343 bool AArch64DAGToDAGISel::SelectSVEShiftImm(SDValue N, uint64_t Low, in SelectSVEShiftImm()
4367 bool AArch64DAGToDAGISel::trySelectStackSlotTagP(SDNode *N) { in trySelectStackSlotTagP()
4396 void AArch64DAGToDAGISel::SelectTagP(SDNode *N) { in SelectTagP()
4418 bool AArch64DAGToDAGISel::trySelectCastFixedLengthToScalableVector(SDNode *N) { in trySelectCastFixedLengthToScalableVector()
4449 bool AArch64DAGToDAGISel::trySelectCastScalableToFixedLengthVector(SDNode *N) { in trySelectCastScalableToFixedLengthVector()
4478 bool AArch64DAGToDAGISel::trySelectXAR(SDNode *N) { in trySelectXAR()
7219 bool AArch64DAGToDAGISel::SelectAddrModeIndexedSVE(SDNode *Root, SDValue N, in SelectAddrModeIndexedSVE()
7275 bool AArch64DAGToDAGISel::SelectSVERegRegAddrMode(SDValue N, unsigned Scale, in SelectSVERegRegAddrMode()
7326 bool AArch64DAGToDAGISel::SelectAllActivePredicate(SDValue N) { in SelectAllActivePredicate()
7333 bool AArch64DAGToDAGISel::SelectAnyPredicate(SDValue N) { in SelectAnyPredicate()
7338 bool AArch64DAGToDAGISel::SelectSMETileSlice(SDValue N, unsigned MaxSize, in SelectSMETileSlice()