Lines Matching full:reg1
1247 unsigned Reg1 = RegInfo->getSEHRegNum(MBBI->getOperand(2).getReg()); in InsertSEH() local
1250 .addImm(Reg1) in InsertSEH()
1260 Register Reg1 = MBBI->getOperand(2).getReg(); in InsertSEH() local
1261 if (Reg0 == AArch64::FP && Reg1 == AArch64::LR) in InsertSEH()
1268 .addImm(RegInfo->getSEHRegNum(Reg1)) in InsertSEH()
1298 unsigned Reg1 = RegInfo->getSEHRegNum(MBBI->getOperand(1).getReg()); in InsertSEH() local
1301 .addImm(Reg1) in InsertSEH()
1309 Register Reg1 = MBBI->getOperand(1).getReg(); in InsertSEH() local
1310 if (Reg0 == AArch64::FP && Reg1 == AArch64::LR) in InsertSEH()
1317 .addImm(RegInfo->getSEHRegNum(Reg1)) in InsertSEH()
1343 unsigned Reg1 = RegInfo->getSEHRegNum(MBBI->getOperand(1).getReg()); in InsertSEH() local
1346 .addImm(Reg1) in InsertSEH()
1356 unsigned Reg1 = RegInfo->getSEHRegNum(MBBI->getOperand(2).getReg()); in InsertSEH() local
1359 .addImm(Reg1) in InsertSEH()
2863 static bool invalidateWindowsRegisterPairing(unsigned Reg1, unsigned Reg2, in invalidateWindowsRegisterPairing() argument
2877 if (TRI->getEncodingValue(Reg2) == TRI->getEncodingValue(Reg1) + 1) in invalidateWindowsRegisterPairing()
2884 if (Reg1 >= AArch64::X19 && Reg1 <= AArch64::X27 && in invalidateWindowsRegisterPairing()
2885 (Reg1 - AArch64::X19) % 2 == 0 && Reg2 == AArch64::LR && !IsFirst) in invalidateWindowsRegisterPairing()
2890 /// Returns true if Reg1 and Reg2 cannot be paired using a ldp/stp instruction.
2894 static bool invalidateRegisterPairing(unsigned Reg1, unsigned Reg2, in invalidateRegisterPairing() argument
2899 return invalidateWindowsRegisterPairing(Reg1, Reg2, NeedsWinCFI, IsFirst, in invalidateRegisterPairing()
2913 unsigned Reg1 = AArch64::NoRegister; member
2984 RPI.Reg1 = CSI[i].getReg(); in computeCalleeSaveRegisterPairs()
2986 if (AArch64::GPR64RegClass.contains(RPI.Reg1)) in computeCalleeSaveRegisterPairs()
2988 else if (AArch64::FPR64RegClass.contains(RPI.Reg1)) in computeCalleeSaveRegisterPairs()
2990 else if (AArch64::FPR128RegClass.contains(RPI.Reg1)) in computeCalleeSaveRegisterPairs()
2992 else if (AArch64::ZPRRegClass.contains(RPI.Reg1)) in computeCalleeSaveRegisterPairs()
2994 else if (AArch64::PPRRegClass.contains(RPI.Reg1)) in computeCalleeSaveRegisterPairs()
2996 else if (RPI.Reg1 == AArch64::VG) in computeCalleeSaveRegisterPairs()
3004 AArch64InstrInfo::isFpOrNEON(RPI.Reg1)) in computeCalleeSaveRegisterPairs()
3006 LastReg = RPI.Reg1; in computeCalleeSaveRegisterPairs()
3015 !invalidateRegisterPairing(RPI.Reg1, NextReg, IsWindows, in computeCalleeSaveRegisterPairs()
3022 !invalidateWindowsRegisterPairing(RPI.Reg1, NextReg, NeedsWinCFI, in computeCalleeSaveRegisterPairs()
3034 if (((RPI.Reg1 - AArch64::Z0) & 1) == 0 && (NextReg == RPI.Reg1 + 1)) in computeCalleeSaveRegisterPairs()
3053 RPI.Reg1 == AArch64::LR) && in computeCalleeSaveRegisterPairs()
3057 assert((!RPI.isPaired() || !NeedsFrameRecord || RPI.Reg1 != AArch64::FP || in computeCalleeSaveRegisterPairs()
3067 ((RPI.Reg1 == AArch64::LR && RPI.Reg2 == AArch64::FP) || in computeCalleeSaveRegisterPairs()
3068 RPI.Reg1 + 1 == RPI.Reg2))) && in computeCalleeSaveRegisterPairs()
3128 ((!IsWindows && RPI.Reg1 == AArch64::LR && RPI.Reg2 == AArch64::FP) || in computeCalleeSaveRegisterPairs()
3129 (IsWindows && RPI.Reg1 == AArch64::FP && RPI.Reg2 == AArch64::LR))) in computeCalleeSaveRegisterPairs()
3172 MIB.addReg(RPI.Reg1); in spillCalleeSavedRegisters()
3176 if (!MRI.isReserved(RPI.Reg1)) in spillCalleeSavedRegisters()
3177 MBB.addLiveIn(RPI.Reg1); in spillCalleeSavedRegisters()
3185 unsigned Reg1 = RPI.Reg1; in spillCalleeSavedRegisters() local
3235 if (Reg1 == AArch64::VG) { in spillCalleeSavedRegisters()
3237 Reg1 = findScratchNonCalleeSaveRegister(&MBB); in spillCalleeSavedRegisters()
3238 assert(Reg1 != AArch64::NoRegister); in spillCalleeSavedRegisters()
3245 BuildMI(MBB, MI, DL, TII.get(AArch64::RDSVLI_XI), Reg1) in spillCalleeSavedRegisters()
3248 BuildMI(MBB, MI, DL, TII.get(AArch64::UBFMXri), Reg1) in spillCalleeSavedRegisters()
3249 .addReg(Reg1) in spillCalleeSavedRegisters()
3256 BuildMI(MBB, MI, DL, TII.get(AArch64::CNTD_XPiI), Reg1) in spillCalleeSavedRegisters()
3269 X0Scratch = Reg1; in spillCalleeSavedRegisters()
3272 BuildMI(MBB, MI, DL, TII.get(AArch64::ORRXrr), Reg1) in spillCalleeSavedRegisters()
3286 Reg1 = AArch64::X0; in spillCalleeSavedRegisters()
3291 LLVM_DEBUG(dbgs() << "CSR spill: (" << printReg(Reg1, TRI); in spillCalleeSavedRegisters()
3297 assert((!NeedsWinCFI || !(Reg1 == AArch64::LR && Reg2 == AArch64::FP)) && in spillCalleeSavedRegisters()
3305 std::swap(Reg1, Reg2); in spillCalleeSavedRegisters()
3318 return c.Reg1 == RegPairInfo::PPR; in spillCalleeSavedRegisters()
3334 if (!MRI.isReserved(Reg1)) in spillCalleeSavedRegisters()
3335 MBB.addLiveIn(Reg1); in spillCalleeSavedRegisters()
3338 MIB.addReg(/*PairRegs*/ AArch64::Z0_Z1 + (RPI.Reg1 - AArch64::Z0)); in spillCalleeSavedRegisters()
3354 if (!MRI.isReserved(Reg1)) in spillCalleeSavedRegisters()
3355 MBB.addLiveIn(Reg1); in spillCalleeSavedRegisters()
3364 MIB.addReg(Reg1, getPrologueDeath(MF, Reg1)) in spillCalleeSavedRegisters()
3410 MIB.addReg(RPI.Reg1, RegState::Define); in restoreCalleeSavedRegisters()
3428 unsigned Reg1 = RPI.Reg1; in restoreCalleeSavedRegisters() local
3471 LLVM_DEBUG(dbgs() << "CSR restore: (" << printReg(Reg1, TRI); in restoreCalleeSavedRegisters()
3483 std::swap(Reg1, Reg2); in restoreCalleeSavedRegisters()
3504 MIB.addReg(/*PairRegs*/ AArch64::Z0_Z1 + (RPI.Reg1 - AArch64::Z0), in restoreCalleeSavedRegisters()
3527 MIB.addReg(Reg1, getDefRegState(true)); in restoreCalleeSavedRegisters()