Lines Matching full:lv

98   LiveVariables *LV = nullptr;  member in __anon97cd436d0111::TwoAddressInstructionImpl
272 LV(MFAM.getCachedResult<LiveVariablesAnalysis>(Func)), in INITIALIZE_PASS_DEPENDENCY()
287 LV = LVWrapper ? &LVWrapper->getLV() : nullptr; in TwoAddressInstructionImpl()
790 MachineInstr *NewMI = TII->convertToThreeAddress(*mi, LV, LIS); in convertInstTo3Addr()
910 // Bail immediately if we don't have LV or LIS available. We use them to find in rescheduleMIBelowKill()
912 if (!LV && !LIS) in rescheduleMIBelowKill()
935 KillMI = LV->getVarInfo(Reg).findKill(MBB); in rescheduleMIBelowKill()
1064 LV->removeVirtualRegisterKilled(Reg, *KillMI); in rescheduleMIBelowKill()
1065 LV->addVirtualRegisterKilled(Reg, *MI); in rescheduleMIBelowKill()
1098 // Bail immediately if we don't have LV or LIS available. We use them to find in rescheduleKillAboveMI()
1100 if (!LV && !LIS) in rescheduleKillAboveMI()
1123 KillMI = LV->getVarInfo(Reg).findKill(MBB); in rescheduleKillAboveMI()
1227 LV->removeVirtualRegisterKilled(Reg, *KillMI); in rescheduleKillAboveMI()
1228 LV->addVirtualRegisterKilled(Reg, *MI); in rescheduleKillAboveMI()
1442 if (LV) { in tryInstructionTransform()
1448 LV->replaceKillInstruction(MO.getReg(), MI, *NewMIs[0]); in tryInstructionTransform()
1453 LV->replaceKillInstruction(MO.getReg(), MI, *NewMIs[1]); in tryInstructionTransform()
1456 } else if (LV->removeVirtualRegisterDead(MO.getReg(), MI)) { in tryInstructionTransform()
1459 LV->addVirtualRegisterDead(MO.getReg(), *NewMIs[1]); in tryInstructionTransform()
1464 LV->addVirtualRegisterDead(MO.getReg(), *NewMIs[0]); in tryInstructionTransform()
1469 LV->addVirtualRegisterKilled(Reg, *NewMIs[1]); in tryInstructionTransform()
1688 if (RemovedKillFlag && RemainingUses.none() && LV && in processTiedPairs()
1689 LV->getVarInfo(RegB).removeKill(*MI)) { in processTiedPairs()
1692 LV->addVirtualRegisterKilled(RegB, *PrevMI); in processTiedPairs()
1767 // TODO: Recompute LIS/LV information for new range here. in processStatepoint()
1777 } else if (LV && LV->getVarInfo(RegB).findKill(MI->getParent()) != MI) { in processStatepoint()
1781 LLVM_DEBUG(dbgs() << "LV: " << printReg(RegB, TRI, 0) in processStatepoint()
1813 if (LV) { in processStatepoint()
1815 LV->removeVirtualRegisterKilled(RegB, *MI); in processStatepoint()
1816 LiveVariables::VarInfo &SrcInfo = LV->getVarInfo(RegB); in processStatepoint()
1817 LiveVariables::VarInfo &DstInfo = LV->getVarInfo(RegA); in processStatepoint()
1821 LV->addVirtualRegisterKilled(RegB, *KillMI, false); in processStatepoint()
2041 if (LV && isKill && !SrcReg.isPhysical()) in eliminateRegSequence()
2042 LV->replaceKillInstruction(SrcReg, MI, *CopyMI); in eliminateRegSequence()