Lines Matching defs:DefMI
174 const MachineInstr *DefMI, unsigned DefOperIdx,
177 const unsigned InstrLatency = computeInstrLatency(DefMI);
178 const unsigned DefaultDefLatency = TII->defaultDefLatency(SchedModel, *DefMI);
186 OperLatency = TII->getOperandLatency(&InstrItins, *DefMI, DefOperIdx,
190 unsigned DefClass = DefMI->getDesc().getSchedClass();
201 const MCSchedClassDesc *SCDesc = resolveSchedClass(DefMI);
202 unsigned DefIdx = findDefIdx(DefMI, DefOperIdx);
225 if (SCDesc->isValid() && !DefMI->getOperand(DefOperIdx).isImplicit() &&
226 !DefMI->getDesc().operands()[DefOperIdx].isOptionalDef() &&
229 << *DefMI << " (Try with MCSchedModel.CompleteModel set to false)";
236 return DefMI->isTransient() ? 0 : DefaultDefLatency;
274 computeOutputLatency(const MachineInstr *DefMI, unsigned DefOperIdx,
287 Register Reg = DefMI->getOperand(DefOperIdx).getReg();
288 const MachineFunction &MF = *DefMI->getMF();
291 return computeInstrLatency(DefMI);
296 const MCSchedClassDesc *SCDesc = resolveSchedClass(DefMI);