Lines Matching refs:RC

192 TargetRegisterInfo::getAllocatableClass(const TargetRegisterClass *RC) const {  in getAllocatableClass()
193 if (!RC || RC->isAllocatable()) in getAllocatableClass()
194 return RC; in getAllocatableClass()
196 for (BitMaskClassIterator It(RC->getSubClassMask(), *this); It.isValid(); in getAllocatableClass()
216 for (const TargetRegisterClass* RC : regclasses()) { in getMinimalPhysRegClass() local
217 if ((VT == MVT::Other || isTypeLegalForClass(*RC, VT)) && in getMinimalPhysRegClass()
218 RC->contains(reg) && (!BestRC || BestRC->hasSubClass(RC))) in getMinimalPhysRegClass()
219 BestRC = RC; in getMinimalPhysRegClass()
234 for (const TargetRegisterClass *RC : regclasses()) { in getMinimalPhysRegClassLLT() local
235 if ((!Ty.isValid() || isTypeLegalForClass(*RC, Ty)) && RC->contains(reg) && in getMinimalPhysRegClassLLT()
236 (!BestRC || BestRC->hasSubClass(RC))) in getMinimalPhysRegClassLLT()
237 BestRC = RC; in getMinimalPhysRegClassLLT()
246 const TargetRegisterClass *RC, BitVector &R){ in getAllocatableSetForRC() argument
247 assert(RC->isAllocatable() && "invalid for nonallocatable sets"); in getAllocatableSetForRC()
248 ArrayRef<MCPhysReg> Order = RC->getRawAllocationOrder(MF); in getAllocatableSetForRC()
254 const TargetRegisterClass *RC) const { in getAllocatableSet()
256 if (RC) { in getAllocatableSet()
258 const TargetRegisterClass *SubClass = getAllocatableClass(RC); in getAllocatableSet()
350 const TargetRegisterClass *RC = in getCommonSuperRegClass() local
352 if (!RC || getRegSizeInBits(*RC) < MinSize) in getCommonSuperRegClass()
361 if (BestRC && getRegSizeInBits(*RC) >= getRegSizeInBits(*BestRC)) in getCommonSuperRegClass()
365 BestRC = RC; in getCommonSuperRegClass()
496 const TargetRegisterClass *RC{}; in getRegSizeInBits() local
501 RC = getMinimalPhysRegClass(Reg); in getRegSizeInBits()
502 assert(RC && "Unable to deduce the register class"); in getRegSizeInBits()
503 return getRegSizeInBits(*RC); in getRegSizeInBits()
510 RC = MRI.getRegClass(Reg); in getRegSizeInBits()
511 assert(RC && "Unable to deduce the register class"); in getRegSizeInBits()
512 return getRegSizeInBits(*RC); in getRegSizeInBits()
516 const MachineRegisterInfo &MRI, const TargetRegisterClass *RC, in getCoveringSubRegIndexes() argument
524 if (getSubClassWithSubReg(RC, Idx) != RC) in getCoveringSubRegIndexes()