1442 TargetInstrInfo::getOperandLatency(const InstrItineraryData *ItinData,  in getOperandLatency()  argument
1445   if (!ItinData || ItinData->isEmpty())  in getOperandLatency()
1453     return ItinData->getOperandCycle(DefClass, DefIdx);  in getOperandLatency()
1455   return ItinData->getOperandLatency(DefClass, DefIdx, UseClass, UseIdx);  in getOperandLatency()
1458 unsigned TargetInstrInfo::getInstrLatency(const InstrItineraryData *ItinData,  in getInstrLatency()  argument
1460   if (!ItinData || ItinData->isEmpty())  in getInstrLatency()
1466   return ItinData->getStageLatency(get(N->getMachineOpcode()).getSchedClass());  in getInstrLatency()
1473 unsigned TargetInstrInfo::getNumMicroOps(const InstrItineraryData *ItinData,  in getNumMicroOps()  argument
1475   if (!ItinData || ItinData->isEmpty())  in getNumMicroOps()
1479   int UOps = ItinData->Itineraries[Class].NumMicroOps;  in getNumMicroOps()
1504 unsigned TargetInstrInfo::getInstrLatency(const InstrItineraryData *ItinData,  in getInstrLatency()  argument
1509   if (!ItinData)  in getInstrLatency()
1512   return ItinData->getStageLatency(MI.getDesc().getSchedClass());  in getInstrLatency()
1518   const InstrItineraryData *ItinData = SchedModel.getInstrItineraries();  in hasLowDefLatency()  local
1519   if (!ItinData || ItinData->isEmpty())  in hasLowDefLatency()
1524       ItinData->getOperandCycle(DefClass, DefIdx);  in hasLowDefLatency()
1644     const InstrItineraryData *ItinData, const MachineInstr &DefMI,  in getOperandLatency()  argument
1648   return ItinData->getOperandLatency(DefClass, DefIdx, UseClass, UseIdx);  in getOperandLatency()