Lines Matching refs:IntvOut
1636 unsigned IntvOut, SlotIndex EnterAfter){ in splitLiveThroughBlock() argument
1642 << ", live-through " << IntvIn << " -> " << IntvOut); in splitLiveThroughBlock()
1644 assert((IntvIn || IntvOut) && "Use splitSingleBlock for isolated blocks"); in splitLiveThroughBlock()
1652 if (!IntvOut) { in splitLiveThroughBlock()
1673 selectIntv(IntvOut); in splitLiveThroughBlock()
1680 if (IntvIn == IntvOut && !LeaveBefore && !EnterAfter) { in splitLiveThroughBlock()
1686 selectIntv(IntvOut); in splitLiveThroughBlock()
1693 assert((!IntvOut || !EnterAfter || EnterAfter < LSP) && "Impossible intf"); in splitLiveThroughBlock()
1695 if (IntvIn != IntvOut && (!LeaveBefore || !EnterAfter || in splitLiveThroughBlock()
1703 selectIntv(IntvOut); in splitLiveThroughBlock()
1726 selectIntv(IntvOut); in splitLiveThroughBlock()
1831 unsigned IntvOut, SlotIndex EnterAfter) { in splitRegOutBlock() argument
1837 << BI.LastInstr << ", reg-out " << IntvOut in splitRegOutBlock()
1843 assert(IntvOut && "Must have register out"); in splitRegOutBlock()
1854 selectIntv(IntvOut); in splitRegOutBlock()
1866 selectIntv(IntvOut); in splitRegOutBlock()
1882 selectIntv(IntvOut); in splitRegOutBlock()