Lines Matching refs:isOne
963 if (!N1C || !N1C->isOne()) in combineShiftToAVG()
982 ConstOp->isOne()) { in combineShiftToAVG()
989 ConstOp->isOne()) { in combineShiftToAVG()
2036 if (DemandedBits.isOne()) in SimplifyDemandedBits()
2341 if (DemandedBits.isOne() && !TLO.LegalOps && !VT.isVector()) in SimplifyDemandedBits()
2835 if (Op.getOpcode() == ISD::SUB && DemandedBits.isOne() && in SimplifyDemandedBits()
2863 if (C && !C->isAllOnes() && !C->isOne() && in SimplifyDemandedBits()
3924 return CVal.isOne(); in isConstTrueVal()
3959 return N->isOne(); in isExtendedTrueVal()
3966 return (N->isOne() && !SExt) || (SExt && (N->getValueType(0) != MVT::i1)); in isExtendedTrueVal()
4530 if (N0.getOpcode() == ISD::SRL && (C1.isZero() || C1.isOne()) && in SimplifySetCC()
4794 } else if ((N1C->isZero() || N1C->isOne()) && in SimplifySetCC()
4804 bool TrueWhenTrue = (Cond == ISD::SETEQ) ^ (!N1C->isOne()); in SimplifySetCC()
4844 } else if (N1C->isOne()) { in SimplifySetCC()
6330 if (Divisor.isOne() || Divisor.isAllOnes()) { in BuildSDIV()
6500 if (Divisor.isOne()) { in BuildUDIV()
6740 bool TautologicalLane = D.isOne() || TautologicalInvertedLane; in prepareUREMEqFold()
6752 assert((!D.isOne() || (K == 0)) && "For divisor '1' we won't rotate."); in prepareUREMEqFold()
6759 AllDivisorsArePowerOfTwo &= D0.isOne(); in prepareUREMEqFold()
6765 assert((D0 * P).isOne() && "Multiplicative inverse basic check failed."); in prepareUREMEqFold()
6998 HadOneDivisor |= D.isOne(); in prepareSREMEqFold()
6999 AllDivisorsAreOnes &= D.isOne(); in prepareSREMEqFold()
7003 assert((!D.isOne() || (K == 0)) && "For divisor '1' we won't rotate."); in prepareSREMEqFold()
7014 AllDivisorsArePowerOfTwo &= D0.isOne(); in prepareSREMEqFold()
7020 assert((D0 * P).isOne() && "Multiplicative inverse basic check failed."); in prepareSREMEqFold()
7041 if (D0.isOne()) { in prepareSREMEqFold()
7050 if (D.isOne()) { in prepareSREMEqFold()
7812 if (HalfMaxPlus1.urem(Divisor).isOne()) { in expandDIVREMByConstant()