Lines Matching refs:N1C
962 ConstantSDNode *N1C = isConstOrConstSplat(Op.getOperand(1), DemandedElts); in combineShiftToAVG() local
963 if (!N1C || !N1C->isOne()) in combineShiftToAVG()
4164 EVT SCCVT, SDValue N0, SDValue N1C, ISD::CondCode Cond, in optimizeSetCCByHoistingAndByConstFromLogicalShift() argument
4166 assert(isConstOrConstSplat(N1C) && isConstOrConstSplat(N1C)->isZero() && in optimizeSetCCByHoistingAndByConstFromLogicalShift()
4228 SDValue T2 = DAG.getSetCC(DL, SCCVT, T1, N1C, Cond); in optimizeSetCCByHoistingAndByConstFromLogicalShift()
4503 if (auto *N1C = isConstOrConstSplat(N1)) { in SimplifySetCC() local
4504 const APInt &C1 = N1C->getAPIntValue(); in SimplifySetCC()
4554 if (auto *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) { in SimplifySetCC() local
4555 const APInt &C1 = N1C->getAPIntValue(); in SimplifySetCC()
4626 isExtendedTrueVal(N1C, N0->getValueType(0), SExt))) { in SimplifySetCC()
4628 bool Inverse = (N1C->isZero() && Cond == ISD::SETEQ) || in SimplifySetCC()
4629 (!N1C->isZero() && Cond == ISD::SETNE); in SimplifySetCC()
4794 } else if ((N1C->isZero() || N1C->isOne()) && in SimplifySetCC()
4804 bool TrueWhenTrue = (Cond == ISD::SETEQ) ^ (!N1C->isOne()); in SimplifySetCC()
4844 } else if (N1C->isOne()) { in SimplifySetCC()
4892 if (N0.getOpcode() == ISD::UREM && N1C->isZero() && in SimplifySetCC()
4905 N1C && N1C->isAllOnes()) { in SimplifySetCC()
4918 if (auto *N1C = isConstOrConstSplat(N1)) { in SimplifySetCC() local
4919 const APInt &C1 = N1C->getAPIntValue(); in SimplifySetCC()
4922 unsigned OperandBitSize = N1C->getValueType(0).getScalarSizeInBits(); in SimplifySetCC()
4943 (!N1C->isOpaque() || (C.getBitWidth() <= 64 && in SimplifySetCC()
4963 (!N1C->isOpaque() || (C.getBitWidth() <= 64 && in SimplifySetCC()
5019 bool CmpZero = N1C->isZero(); in SimplifySetCC()
5020 bool CmpNegOne = N1C->isAllOnes(); in SimplifySetCC()
5101 if (auto *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) { in SimplifySetCC() local
5103 const APInt &C1 = N1C->getAPIntValue(); in SimplifySetCC()