Lines Matching refs:ZERO_EXTEND
313 if (N->getOpcode() == ISD::ZERO_EXTEND) { in isVectorShrinkable()
572 return ISD::ZERO_EXTEND; in getExtForLoadExtType()
1468 getNode(ISD::ZERO_EXTEND, DL, VT, Op) : in getZExtOrTrunc()
2783 case ISD::ZERO_EXTEND: in isSplatValue()
3813 case ISD::ZERO_EXTEND: { in computeKnownBits()
4186 if (TLI->getExtendForAtomicOps() == ISD::ZERO_EXTEND) in computeKnownBits()
4422 if (Val.getOpcode() == ISD::ZERO_EXTEND) in isKnownToBeAPowerOfTwo()
5031 if (TLI->getExtendForAtomicOps() == ISD::ZERO_EXTEND) in ComputeNumSignBits()
5307 case ISD::ZERO_EXTEND: in canCreateUndefOrPoison()
5651 case ISD::ZERO_EXTEND: in isKnownNeverZero()
5715 if (NotOperand->getOpcode() == ISD::ZERO_EXTEND || in haveNoCommonBitsSetCommutative()
5728 if (A->getOpcode() == ISD::ZERO_EXTEND || A->getOpcode() == ISD::TRUNCATE) in haveNoCommonBitsSetCommutative()
5731 if (B->getOpcode() == ISD::ZERO_EXTEND || B->getOpcode() == ISD::TRUNCATE) in haveNoCommonBitsSetCommutative()
5928 case ISD::ZERO_EXTEND: in getNode()
6010 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) { in getNode()
6012 if (OpOpcode == ISD::ZERO_EXTEND) in getNode()
6020 case ISD::ZERO_EXTEND: in getNode()
6031 if (OpOpcode == ISD::ZERO_EXTEND) { // (zext (zext x)) -> (zext x) in getNode()
6034 return getNode(ISD::ZERO_EXTEND, DL, VT, N1.getOperand(0), Flags); in getNode()
6070 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || in getNode()
6073 if (OpOpcode == ISD::ZERO_EXTEND) in getNode()
6103 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || in getNode()
6410 case ISD::ZERO_EXTEND: in FoldConstantArithmetic()
7663 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, IntVT, Value); in getMemsetValue()