Lines Matching refs:RoundWidth
555 unsigned RoundWidth = 1 << LogStWidth; in LegalizeStoreOps() local
556 assert(RoundWidth < StWidthBits); in LegalizeStoreOps()
557 unsigned ExtraWidth = StWidthBits - RoundWidth; in LegalizeStoreOps()
558 assert(ExtraWidth < RoundWidth); in LegalizeStoreOps()
559 assert(!(RoundWidth % 8) && !(ExtraWidth % 8) && in LegalizeStoreOps()
561 EVT RoundVT = EVT::getIntegerVT(*DAG.getContext(), RoundWidth); in LegalizeStoreOps()
573 IncrementSize = RoundWidth / 8; in LegalizeStoreOps()
578 DAG.getConstant(RoundWidth, dl, in LegalizeStoreOps()
595 IncrementSize = RoundWidth / 8; in LegalizeStoreOps()
767 unsigned RoundWidth = 1 << LogSrcWidth; in LegalizeLoadOps() local
768 assert(RoundWidth < SrcWidthBits); in LegalizeLoadOps()
769 unsigned ExtraWidth = SrcWidthBits - RoundWidth; in LegalizeLoadOps()
770 assert(ExtraWidth < RoundWidth); in LegalizeLoadOps()
771 assert(!(RoundWidth % 8) && !(ExtraWidth % 8) && in LegalizeLoadOps()
773 EVT RoundVT = EVT::getIntegerVT(*DAG.getContext(), RoundWidth); in LegalizeLoadOps()
787 IncrementSize = RoundWidth / 8; in LegalizeLoadOps()
802 DAG.getConstant(RoundWidth, dl, in LegalizeLoadOps()
816 IncrementSize = RoundWidth / 8; in LegalizeLoadOps()