Lines Matching refs:NewEltVT
3483 EVT NewEltVT = TLI.getTypeToTransformTo(*DAG.getContext(), EltVT); in ExpandNode() local
3488 if (NewEltVT.bitsLT(EltVT)) { in ExpandNode()
3495 EVT::getVectorVT(*DAG.getContext(), NewEltVT, in ExpandNode()
3496 VT.getSizeInBits() / NewEltVT.getSizeInBits()); in ExpandNode()
3523 EltVT = NewEltVT; in ExpandNode()
5074 MVT EltVT, MVT NewEltVT) { in getPromotedVectorElementType() argument
5075 unsigned OldEltsPerNewElt = EltVT.getSizeInBits() / NewEltVT.getSizeInBits(); in getPromotedVectorElementType()
5077 ? NewEltVT in getPromotedVectorElementType()
5078 : MVT::getVectorVT(NewEltVT, OldEltsPerNewElt); in getPromotedVectorElementType()
5597 MVT NewEltVT = NVT.getVectorElementType(); in PromoteNode() local
5607 assert(NewEltVT.bitsLE(EltVT) && "not handled"); in PromoteNode()
5609 MVT MidVT = getPromotedVectorElementType(TLI, EltVT, NewEltVT); in PromoteNode()
5617 DAG.getNode(MidVT == NewEltVT ? ISD::BUILD_VECTOR : ISD::CONCAT_VECTORS, in PromoteNode()
5625 MVT NewEltVT = NVT.getVectorElementType(); in PromoteNode() local
5640 assert(NewEltVT.bitsLT(EltVT) && "not handled"); in PromoteNode()
5642 MVT MidVT = getPromotedVectorElementType(TLI, EltVT, NewEltVT); in PromoteNode()
5658 SDValue Elt = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, NewEltVT, in PromoteNode()
5669 MVT NewEltVT = NVT.getVectorElementType(); in PromoteNode() local
5686 assert(NewEltVT.bitsLT(EltVT) && "not handled"); in PromoteNode()
5688 MVT MidVT = getPromotedVectorElementType(TLI, EltVT, NewEltVT); in PromoteNode()
5707 SDValue Elt = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, NewEltVT, in PromoteNode()
5719 MVT NewEltVT = NVT.getVectorElementType(); in PromoteNode() local
5728 MVT MidVT = getPromotedVectorElementType(TLI, EltVT, NewEltVT); in PromoteNode()