Lines Matching refs:DestVT
157 SDValue EmitStackConvert(SDValue SrcOp, EVT SlotVT, EVT DestVT,
159 SDValue EmitStackConvert(SDValue SrcOp, EVT SlotVT, EVT DestVT,
869 EVT DestVT = Node->getValueType(0); in LegalizeLoadOps() local
870 if (!TLI.isLoadExtLegal(ISD::EXTLOAD, DestVT, SrcVT)) { in LegalizeLoadOps()
898 EVT IDestVT = DestVT.changeTypeToInteger(); in LegalizeLoadOps()
905 dl, DestVT, Result); in LegalizeLoadOps()
1774 EVT DestVT, const SDLoc &dl) { in EmitStackConvert() argument
1775 return EmitStackConvert(SrcOp, SlotVT, DestVT, dl, DAG.getEntryNode()); in EmitStackConvert()
1779 EVT DestVT, const SDLoc &dl, in EmitStackConvert() argument
1782 Type *DestType = DestVT.getTypeForEVT(*DAG.getContext()); in EmitStackConvert()
1788 (SlotVT.bitsLT(DestVT) && in EmitStackConvert()
1789 !TLI.isLoadExtLegalOrCustom(ISD::EXTLOAD, DestVT, SlotVT))) in EmitStackConvert()
1815 if (SlotVT.bitsEq(DestVT)) in EmitStackConvert()
1816 return DAG.getLoad(DestVT, dl, Store, FIPtr, PtrInfo, DestAlign); in EmitStackConvert()
1818 assert(SlotVT.bitsLT(DestVT) && "Unknown extension!"); in EmitStackConvert()
1819 return DAG.getExtLoad(ISD::EXTLOAD, dl, DestVT, Store, FIPtr, PtrInfo, SlotVT, in EmitStackConvert()
2647 EVT DestVT = Node->getValueType(0); in ExpandLegalINT_TO_FP() local
2656 (DestVT.bitsLE(MVT::f64) || in ExpandLegalINT_TO_FP()
2659 DestVT))) { in ExpandLegalINT_TO_FP()
2707 if (DestVT != Sub.getValueType()) { in ExpandLegalINT_TO_FP()
2710 DAG.getStrictFPExtendOrRound(Sub, Chain, dl, DestVT); in ExpandLegalINT_TO_FP()
2718 Result = DAG.getFPExtendOrRound(Sub, dl, DestVT); in ExpandLegalINT_TO_FP()
2727 if (((SrcVT == MVT::i32 || SrcVT == MVT::i64) && DestVT == MVT::f32) || in ExpandLegalINT_TO_FP()
2728 (SrcVT == MVT::i64 && DestVT == MVT::f64)) { in ExpandLegalINT_TO_FP()
2761 Fast = DAG.getNode(ISD::STRICT_SINT_TO_FP, dl, { DestVT, MVT::Other }, in ExpandLegalINT_TO_FP()
2763 Slow = DAG.getNode(ISD::STRICT_FADD, dl, { DestVT, MVT::Other }, in ExpandLegalINT_TO_FP()
2775 SDValue SignCvt = DAG.getNode(ISD::SINT_TO_FP, dl, DestVT, Or); in ExpandLegalINT_TO_FP()
2776 Slow = DAG.getNode(ISD::FADD, dl, DestVT, SignCvt, SignCvt); in ExpandLegalINT_TO_FP()
2777 Fast = DAG.getNode(ISD::SINT_TO_FP, dl, DestVT, Op0); in ExpandLegalINT_TO_FP()
2780 return DAG.getSelect(dl, DestVT, SignBitTest, Slow, Fast); in ExpandLegalINT_TO_FP()
2785 Node->isStrictFPOpcode() ? ISD::STRICT_FADD : ISD::FADD, DestVT)) in ExpandLegalINT_TO_FP()
2791 assert(APFloat::semanticsPrecision(DAG.EVTToAPFloatSemantics(DestVT)) >= in ExpandLegalINT_TO_FP()
2797 Tmp1 = DAG.getNode(ISD::STRICT_SINT_TO_FP, dl, { DestVT, MVT::Other }, in ExpandLegalINT_TO_FP()
2800 Tmp1 = DAG.getNode(ISD::SINT_TO_FP, dl, DestVT, Op0); in ExpandLegalINT_TO_FP()
2832 if (DestVT == MVT::f32) in ExpandLegalINT_TO_FP()
2839 ISD::EXTLOAD, dl, DestVT, DAG.getEntryNode(), CPIdx, in ExpandLegalINT_TO_FP()
2848 SDValue Result = DAG.getNode(ISD::STRICT_FADD, dl, { DestVT, MVT::Other }, in ExpandLegalINT_TO_FP()
2854 return DAG.getNode(ISD::FADD, dl, DestVT, Tmp1, FudgeInReg); in ExpandLegalINT_TO_FP()
2867 EVT DestVT = N->getValueType(0); in PromoteLegalINT_TO_FP() local
2903 DAG.getNode(OpToUse, dl, {DestVT, MVT::Other}, in PromoteLegalINT_TO_FP()
2913 DAG.getNode(OpToUse, dl, DestVT, in PromoteLegalINT_TO_FP()
2928 EVT DestVT = N->getValueType(0); in PromoteLegalFP_TO_INT() local
2931 EVT NewOutTy = DestVT; in PromoteLegalFP_TO_INT()
2964 SDValue Trunc = DAG.getNode(ISD::TRUNCATE, dl, DestVT, Operation); in PromoteLegalFP_TO_INT()