Lines Matching full:register

46   /// implicit physical register output.
48                        Register SrcReg, DenseMap<SDValue, Register> &VRBaseMap);
54                               DenseMap<SDValue, Register> &VRBaseMap);
56   /// getVR - Return the virtual register corresponding to the specified result
58   Register getVR(SDValue Op,
59                  DenseMap<SDValue, Register> &VRBaseMap);
61   /// AddRegisterOperand - Add the specified register as an operand to the
62   /// specified machine instr. Insert register copies if the register is
63   /// not in the required register class.
68                           DenseMap<SDValue, Register> &VRBaseMap,
79                   DenseMap<SDValue, Register> &VRBaseMap,
82   /// ConstrainForSubReg - Try to constrain VReg to a register class that
84   /// Return the virtual register to use.
85   Register ConstrainForSubReg(Register VReg, unsigned SubIdx, MVT VT,
90   void EmitSubregNode(SDNode *Node, DenseMap<SDValue, Register> &VRBaseMap,
95   /// register is constrained to be in a particular register class.
98                               DenseMap<SDValue, Register> &VRBaseMap);
102   void EmitRegSequence(SDNode *Node, DenseMap<SDValue, Register> &VRBaseMap,
105   /// CountResults - The results of target nodes have register or immediate
113                               DenseMap<SDValue, Register> &VRBaseMap);
118                              DenseMap<SDValue, Register> &VRBaseMap);
122   /// that refers to a virtual register and is corrected later in isel.
124                                 DenseMap<SDValue, Register> &VRBaseMap);
131                                  DenseMap<SDValue, Register> &VRBaseMap);
135                                     DenseMap<SDValue, Register> &VRBaseMap);
143                 DenseMap<SDValue, Register> &VRBaseMap) {  in EmitNode()
163                        DenseMap<SDValue, Register> &VRBaseMap);
165                        DenseMap<SDValue, Register> &VRBaseMap);