Lines Matching refs:ZERO_EXTEND
1455 Op.getValueType().isByteSized() ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; in PromoteOperand()
1908 case ISD::ZERO_EXTEND: return visitZERO_EXTEND(N); in visit()
2040 case ISD::ZERO_EXTEND: in combine()
2540 if (!CN || Z.getOpcode() != ISD::ZERO_EXTEND) in foldAddSubBoolOfMaskedVal()
2695 TLI.isOperationLegal(ISD::ZERO_EXTEND, VT))) && in visitADDLike()
2698 return DAG.getNode(ISD::ZERO_EXTEND, DL, VT, Not); in visitADDLike()
3065 if (V.getOpcode() == ISD::TRUNCATE || V.getOpcode() == ISD::ZERO_EXTEND) { in getAsCarry()
3113 if (N1.getOpcode() == ISD::ZERO_EXTEND) in foldAddSubMasked1()
3194 SDValue ZExt = DAG.getNode(ISD::ZERO_EXTEND, DL, VT, N0.getOperand(0)); in visitADDLikeCommutative()
3773 if (MinLHS.getOpcode() == ISD::ZERO_EXTEND && MinLHS.getOperand(0) == Op0) in foldSubToUSubSat()
3776 if (MinRHS.getOpcode() == ISD::ZERO_EXTEND && MinRHS.getOperand(0) == Op0) in foldSubToUSubSat()
4021 if (N1.getOpcode() == ISD::ZERO_EXTEND && in visitSUB()
5173 N0 = DAG.getNode(ISD::ZERO_EXTEND, DL, NewVT, N0); in visitMULHU()
5174 N1 = DAG.getNode(ISD::ZERO_EXTEND, DL, NewVT, N1); in visitMULHU()
5238 return DAG.getNode(ISD::ZERO_EXTEND, DL, VT, AvgU); in visitAVG()
5436 SDValue Lo = DAG.getNode(ISD::ZERO_EXTEND, DL, NewVT, N0); in visitUMUL_LOHI()
5437 SDValue Hi = DAG.getNode(ISD::ZERO_EXTEND, DL, NewVT, N1); in visitUMUL_LOHI()
6584 case ISD::ZERO_EXTEND: in SearchForAndLoads()
7047 return DAG.getNode(ISD::ZERO_EXTEND, DL, VT, N0Op0); in visitAND()
7054 return DAG.getNode(ISD::ZERO_EXTEND, DL, VT, in visitAND()
7064 (ExtOpc != ISD::ZERO_EXTEND || !TLI.isZExtFree(N0Op0, VT)) && in visitAND()
7195 (!LegalOperations || TLI.isOperationLegal(ISD::ZERO_EXTEND, ExtVT))) { in visitAND()
7199 DAG.getNode(ISD::ZERO_EXTEND, DL, ExtVT, Extendee); in visitAND()
7266 if (SubRHS.getOpcode() == ISD::ZERO_EXTEND && in visitAND()
7271 return DAG.getNode(ISD::ZERO_EXTEND, DL, VT, SubRHS.getOperand(0)); in visitAND()
7340 return DAG.getNode(ISD::ZERO_EXTEND, DL, VT, N0.getOperand(0)); in visitAND()
7747 if (V->getOpcode() == ISD::ZERO_EXTEND || V->getOpcode() == ISD::TRUNCATE) in visitORCommutative()
7796 if (V->getOpcode() == ISD::ZERO_EXTEND) in visitORCommutative()
7825 Lo = DAG.getNode(ISD::ZERO_EXTEND, DL, VT, NotLo); in visitORCommutative()
8593 LHSShiftAmt.getOpcode() == ISD::ZERO_EXTEND || in MatchRotate()
8597 RHSShiftAmt.getOpcode() == ISD::ZERO_EXTEND || in MatchRotate()
8741 case ISD::ZERO_EXTEND: { in calculateByteProvider()
8749 return Op.getOpcode() == ISD::ZERO_EXTEND in calculateByteProvider()
8853 case ISD::ZERO_EXTEND: in stripTruncAndExt()
9489 if (isOneConstant(N1) && N0Opcode == ISD::ZERO_EXTEND && N0.hasOneUse() && in visitXOR()
9496 return DAG.getNode(ISD::ZERO_EXTEND, DL, VT, V); in visitXOR()
9945 if ((N0.getOpcode() == ISD::ZERO_EXTEND || in visitSHL()
9988 if (N0.getOpcode() == ISD::ZERO_EXTEND && N0.hasOneUse() && in visitSHL()
10006 return DAG.getNode(ISD::ZERO_EXTEND, SDLoc(N0), VT, NewSHL); in visitSHL()
10194 bool IsZeroExt = LeftOp.getOpcode() == ISD::ZERO_EXTEND; in combineShiftToMULH()
10948 (Opc0 != ISD::ZERO_EXTEND && Opc0 != ISD::SIGN_EXTEND && in foldABSToABD()
10967 unsigned ABDOpcode = (Opc0 == ISD::ZERO_EXTEND) ? ISD::ABDU : ISD::ABDS; in foldABSToABD()
10977 ABD = DAG.getNode(ISD::ZERO_EXTEND, DL, VT, ABD); in foldABSToABD()
11017 ISD::ZERO_EXTEND, DL, VT, in visitABS()
11870 if (Index.getOpcode() == ISD::ZERO_EXTEND) { in refineIndexType()
12249 auto ExtendOpcode = AllAddOne ? ISD::ZERO_EXTEND : ISD::SIGN_EXTEND; in foldVSelectOfConstants()
12386 auto ExtOpcode = IsSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; in visitVSELECT()
12496 if (LHS == OpLHS && RHS == OpRHS && LHS.getOpcode() == ISD::ZERO_EXTEND) in visitVSELECT()
12809 (LoadExt == ISD::ZEXTLOAD && ExtOpcode != ISD::ZERO_EXTEND)) in isCompatibleLoad()
12827 assert((Opcode == ISD::SIGN_EXTEND || Opcode == ISD::ZERO_EXTEND || in tryToFoldExtendSelectLoad()
12843 else if (Opcode == ISD::ZERO_EXTEND) in tryToFoldExtendSelectLoad()
12890 (Opcode != ISD::ZERO_EXTEND || !TLI.isZExtFree(N0.getValueType(), VT))) { in tryToFoldExtendOfConstant()
12966 if (ExtOpc == ISD::ZERO_EXTEND && ISD::isSignedIntSetCC(CC)) in ExtendUsesToFormExtLoad()
13037 N->getOpcode() == ISD::ZERO_EXTEND) && in CombineExtLoad()
13132 assert(N->getOpcode() == ISD::ZERO_EXTEND); in CombineZExtLogicopShiftLoad()
13172 ISD::ZERO_EXTEND, SetCCs, TLI)) in CombineZExtLogicopShiftLoad()
13189 ExtendSetCCUses(SetCCs, N1.getOperand(0), ExtLoad, ISD::ZERO_EXTEND); in CombineZExtLogicopShiftLoad()
13211 assert((CastOpcode == ISD::SIGN_EXTEND || CastOpcode == ISD::ZERO_EXTEND || in matchVSelectOpSizesWithSetCC()
13295 assert(ExtLoadType == ISD::ZEXTLOAD && ExtOpc == ISD::ZERO_EXTEND && in tryToFoldExtOfLoad()
13407 N->getOpcode() == ISD::ZERO_EXTEND) && "Expected sext or zext"); in foldExtendedSignBitTest()
13488 unsigned ExtOpcode = IsSignedCmp ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; in foldSextSetcc()
13731 (!LegalOperations || TLI.isOperationLegal(ISD::ZERO_EXTEND, VT)) && in visitSIGN_EXTEND()
13735 return DAG.getNode(ISD::ZERO_EXTEND, DL, VT, N0, Flags); in visitSIGN_EXTEND()
13745 N0.getOperand(1).getOpcode() == ISD::ZERO_EXTEND && in visitSIGN_EXTEND()
13754 N0.getOperand(0).getOpcode() == ISD::ZERO_EXTEND && in visitSIGN_EXTEND()
13763 (!LegalOperations || (TLI.isOperationLegal(ISD::ZERO_EXTEND, VT) && in visitSIGN_EXTEND()
13779 SDValue Zext = DAG.getNode(ISD::ZERO_EXTEND, DL, VT, N0.getOperand(0)); in visitSIGN_EXTEND()
13793 assert((Extend->getOpcode() == ISD::ZERO_EXTEND || in widenCtPop()
13815 assert(Extend->getOpcode() == ISD::ZERO_EXTEND && "Expected zero extend."); in widenAbs()
13857 if (N0.getOpcode() == ISD::ZERO_EXTEND || N0.getOpcode() == ISD::ANY_EXTEND) { in visitZERO_EXTEND()
13859 if (N0.getOpcode() == ISD::ZERO_EXTEND) in visitZERO_EXTEND()
13861 return DAG.getNode(ISD::ZERO_EXTEND, DL, VT, N0.getOperand(0), Flags); in visitZERO_EXTEND()
13938 TLI.isOperationLegal(ISD::ZERO_EXTEND, VT))) { in visitZERO_EXTEND()
13977 ISD::ZERO_EXTEND, N->getFlags().hasNonNeg())) in visitZERO_EXTEND()
13982 ISD::ZEXTLOAD, ISD::ZERO_EXTEND)) in visitZERO_EXTEND()
14020 ISD::ZERO_EXTEND, SetCCs, TLI); in visitZERO_EXTEND()
14029 ExtendSetCCUses(SetCCs, N0.getOperand(0), ExtLoad, ISD::ZERO_EXTEND); in visitZERO_EXTEND()
14106 return DAG.getNode(ISD::ZERO_EXTEND, DL, VT, SCC); in visitZERO_EXTEND()
14115 if (ShVal.getOpcode() == ISD::ZERO_EXTEND && N0.hasOneUse()) { in visitZERO_EXTEND()
14137 ShAmt = DAG.getNode(ISD::ZERO_EXTEND, DL, MVT::i32, ShAmt); in visitZERO_EXTEND()
14140 DAG.getNode(ISD::ZERO_EXTEND, DL, VT, ShVal), ShAmt); in visitZERO_EXTEND()
14182 if (N0.getOpcode() == ISD::ANY_EXTEND || N0.getOpcode() == ISD::ZERO_EXTEND || in visitANY_EXTEND()
14185 if (N0.getOpcode() == ISD::ZERO_EXTEND) in visitANY_EXTEND()
14235 ISD::ZEXTLOAD, ISD::ZERO_EXTEND)) in visitANY_EXTEND()
14729 if (N0.getOpcode() == ISD::ZERO_EXTEND) { in visitSIGN_EXTEND_INREG()
14945 if (N0.getOpcode() == ISD::ZERO_EXTEND || in visitTRUNCATE()
15189 N00.getOpcode() == ISD::ZERO_EXTEND || in visitTRUNCATE()
15246 N0.getOperand(0).getOpcode() == ISD::ZERO_EXTEND && in visitTRUNCATE()
17754 if (N0.getOpcode() == ISD::ZERO_EXTEND && in visitSINT_TO_FP()
17840 : ISD::ZERO_EXTEND; in FoldIntToFPToInt()
18875 Val = DAG.getNode(ISD::ZERO_EXTEND, SDLoc(LD), LDType, Val); in extendLoadedValueToExtension()
19372 !TLI.isOperationLegal(ISD::ZERO_EXTEND, TruncateType)) in isLegal()
19433 DAG->getNode(ISD::ZERO_EXTEND, SDLoc(LastInst), FinalType, LastInst); in loadSlice()
21495 if ((Value.getOpcode() == ISD::ZERO_EXTEND || in visitSTORE()
21778 if (Lo.getOpcode() != ISD::ZERO_EXTEND || !Lo.hasOneUse() || in splitMergedValStore()
21781 Hi.getOpcode() != ISD::ZERO_EXTEND || !Hi.hasOneUse() || in splitMergedValStore()
21803 Lo = DAG.getNode(ISD::ZERO_EXTEND, DL, VT, Lo.getOperand(0)); in splitMergedValStore()
21804 Hi = DAG.getNode(ISD::ZERO_EXTEND, DL, VT, Hi.getOperand(0)); in splitMergedValStore()
22004 if (Scalar.getOpcode() == ISD::ZERO_EXTEND || in combineInsertEltToLoad()
22909 bool ZeroExt = In.getOpcode() == ISD::ZERO_EXTEND; in reduceBuildVecExtToExtBuildVec()
22966 Cast.getOpcode() == ISD::ZERO_EXTEND || in reduceBuildVecExtToExtBuildVec()
23253 if (Zext.getOpcode() != ISD::ZERO_EXTEND || !Zext.hasOneUse() || in reduceBuildVecToShuffleWithZero()
23583 FoundZeroExtend |= (Opc == ISD::ZERO_EXTEND); in convertBuildVecZextToZext()
23584 if ((Opc == ISD::ZERO_EXTEND || Opc == ISD::ANY_EXTEND) && in convertBuildVecZextToZext()
23618 return DAG.getNode(FoundZeroExtend ? ISD::ZERO_EXTEND : ISD::ANY_EXTEND, DL, in convertBuildVecZextToZext()
23674 if (Op.getOpcode() != ISD::ZERO_EXTEND) in convertBuildVecZextToBuildVecWithZeros()
27745 Temp = DAG.getNode(ISD::ZERO_EXTEND, SDLoc(N2), VT, SCC); in SimplifySelectCC()
27931 case ISD::ZERO_EXTEND: in takeInexpensiveLog2()