Lines Matching refs:LegalOperations
162 bool LegalOperations = false; member in __anon666e37100111::DAGCombiner
842 return TLI.isOperationLegalOrCustom(Opcode, VT, LegalOperations); in hasOperation()
1381 TargetLowering::TargetLoweringOpt TLO(DAG, LegalTypes, LegalOperations); in SimplifyDemandedBits()
1400 TargetLowering::TargetLoweringOpt TLO(DAG, LegalTypes, LegalOperations); in SimplifyDemandedVectorElts()
1500 if (!LegalOperations) in PromoteIntBinOp()
1568 if (!LegalOperations) in PromoteIntShiftOp()
1617 if (!LegalOperations) in PromoteExtend()
1645 if (!LegalOperations) in PromoteLoad()
1730 LegalOperations = Level >= AfterLegalizeVectorOps; in Run()
2569 if ((!LegalOperations || hasOperation(ISD::AVGCEILU, VT)) && in foldSubToAvg()
2575 if ((!LegalOperations || hasOperation(ISD::AVGCEILS, VT)) && in foldSubToAvg()
2693 if ((!LegalOperations || in visitADDLike()
2934 if ((!LegalOperations || hasOperation(ISD::AVGFLOORU, VT)) && in foldAddToAvg()
2940 if ((!LegalOperations || hasOperation(ISD::AVGFLOORS, VT)) && in foldAddToAvg()
2970 if ((!LegalOperations || TLI.isOperationLegal(ISD::OR, VT)) && in visitADD()
3405 if (!LegalOperations || in visitUADDO_CARRY()
3694 if (!LegalOperations || in visitSADDO_CARRY()
3740 !(!LegalOperations || hasOperation(ISD::USUBSAT, DstVT))) in foldSubToUSubSat()
3787 SelectionDAG &DAG, bool LegalOperations) { in tryFoldToZero() argument
3790 if (!LegalOperations || TLI.isOperationLegal(ISD::BUILD_VECTOR, VT)) in tryFoldToZero()
3811 return tryFoldToZero(DL, TLI, VT, DAG, LegalOperations); in visitSUB()
3844 if (!LegalOperations || TLI.isOperationLegal(NewSh, VT)) in visitSUB()
4030 if ((!LegalOperations || hasOperation(ISD::ABS, VT)) && in visitSUB()
4037 if (!LegalOperations && TLI.isOffsetFoldingLegal(GA)) { in visitSUB()
4070 if (!LegalOperations && N1.getOpcode() == ISD::SRL && N1.hasOneUse()) { in visitSUB()
4262 if (!LegalOperations || in visitUSUBO_CARRY()
4277 if (!LegalOperations || in visitSSUBO_CARRY()
4395 if (!LegalOperations || TLI.isOperationLegalOrCustom(LoHiOpc, VT)) { in visitMUL()
4513 if (!UseVP && (!LegalOperations || hasOperation(ISD::ABS, VT)) && in visitMUL()
4537 if ((!LegalOperations || TLI.isOperationLegalOrCustom(ISD::AND, VT)) && in visitMUL()
5252 (!LegalOperations || hasOperation(ISD::AVGCEILU, VT))) { in visitAVG()
5294 (!LegalOperations || hasOperation(ISD::ABS, VT))) in visitABD()
5316 if (!HiExists && (!LegalOperations || in SimplifyNodeWithTwoResults()
5324 if (!LoExists && (!LegalOperations || in SimplifyNodeWithTwoResults()
5340 (!LegalOperations || in SimplifyNodeWithTwoResults()
5350 (!LegalOperations || in SimplifyNodeWithTwoResults()
5792 if ((VT.isVector() || LegalOperations) && in hoistLogicOpWithSameOpcodeHands()
5818 if (LegalOperations && !TLI.isOperationLegal(LogicOpcode, XVT)) in hoistLogicOpWithSameOpcodeHands()
5914 ShOp = tryFoldToZero(DL, TLI, VT, DAG, LegalOperations); in hoistLogicOpWithSameOpcodeHands()
5927 ShOp = tryFoldToZero(DL, TLI, VT, DAG, LegalOperations); in hoistLogicOpWithSameOpcodeHands()
5959 if (LegalOperations || VT.getScalarType() != MVT::i1) in foldLogicOfSetCCs()
6076 (!LegalOperations || in foldLogicOfSetCCs()
6428 (!LegalOperations || in isAndLoadExtLoad()
6444 if (LegalOperations && in isAndLoadExtLoad()
6507 if (LegalOperations && in isLegalNarrowLdSt()
6535 if (LegalOperations && in isLegalNarrowLdSt()
7195 (!LegalOperations || TLI.isOperationLegal(ISD::ZERO_EXTEND, ExtVT))) { in visitAND()
7293 ((!LegalOperations && LN0->isSimple()) || in visitAND()
7348 if (LegalOperations || VT.isVector()) in visitAND()
7358 if (!LegalOperations) in MatchBSwapHWordLow()
7627 if (!LegalOperations) in MatchBSwapHWord()
7693 if (!LegalOperations && (N0.isUndef() || N1.isUndef())) in visitORLike()
8003 if ((!LegalOperations || TLI.isOperationLegal(ISD::ADD, VT)) && in visitOR()
8010 if (LegalOperations || VT.isVector()) in visitOR()
8416 if (LegalOperations && !HasROTL && !HasROTR && !HasFSHL && !HasFSHR) in MatchRotate()
8567 bool UseROTL = !LegalOperations || HasROTL; in MatchRotate()
8571 bool UseFSHL = !LegalOperations || HasFSHL; in MatchRotate()
8889 if (LegalOperations || OptLevel == CodeGenOptLevel::None) in mergeTruncStores()
9217 if (LegalOperations && in MatchLoadCombine()
9249 if (NeedsBswap && (LegalOperations || NeedsZext) && in MatchLoadCombine()
9255 if (NeedsBswap && NeedsZext && LegalOperations && in MatchLoadCombine()
9438 if ((!LegalOperations || TLI.isOperationLegal(ISD::OR, VT)) && in visitXOR()
9447 if ((!LegalOperations || TLI.isOperationLegal(ISD::ADD, VT)) && in visitXOR()
9459 if (!LegalOperations || in visitXOR()
9548 if (!LegalOperations || hasOperation(ISD::ABS, VT)) { in visitXOR()
9563 return tryFoldToZero(DL, TLI, VT, DAG, LegalOperations); in visitXOR()
10904 if (!LegalOperations || TLI.isOperationLegalOrCustom(ISD::SHL, VT)) { in visitSHLSAT()
11057 (!LegalOperations || hasOperation(ISD::BSWAP, HalfVT))) { in visitBSWAP()
11105 if ((!LegalOperations || TLI.isOperationLegal(ISD::SHL, VT)) && in visitBITREVERSE()
11110 if ((!LegalOperations || TLI.isOperationLegal(ISD::SRL, VT)) && in visitBITREVERSE()
11127 if (!LegalOperations || TLI.isOperationLegal(ISD::CTLZ_ZERO_UNDEF, VT)) in visitCTLZ()
11156 if (!LegalOperations || TLI.isOperationLegal(ISD::CTTZ_ZERO_UNDEF, VT)) in visitCTTZ()
11291 True, DAG, LegalOperations, ForCodeSize); in combineMinNumMaxNum()
11307 RHS, DAG, LegalOperations, ForCodeSize); in combineMinNumMaxNum()
11393 if (CondVT != MVT::i1 || LegalOperations) { in foldSelectOfConstants()
11423 assert(CondVT == MVT::i1 && !LegalOperations); in foldSelectOfConstants()
11721 if (!LegalOperations && TLI.isOperationLegalOrCustom(ISD::UADDO, VT) && in visitSELECT()
11746 (!LegalOperations && in visitSELECT()
12026 MST->getMemoryVT(), LegalOperations)) { in visitMSTORE()
13142 (LegalOperations && !TLI.isOperationLegal(N0.getOpcode(), VT))) in CombineZExtLogicopShiftLoad()
13149 (LegalOperations && !TLI.isOperationLegal(N1.getOpcode(), VT))) in CombineZExtLogicopShiftLoad()
13220 if (LegalOperations || !TLI.isOperationLegalOrCustom(ISD::VSELECT, VT)) in matchVSelectOpSizesWithSetCC()
13254 bool LegalOperations, SDNode *N, in tryToFoldExtOfExtload() argument
13265 if ((LegalOperations || !LN0->isSimple() || in tryToFoldExtOfExtload()
13286 bool LegalOperations, SDNode *N, SDValue N0, in tryToFoldExtOfLoad() argument
13312 if ((LegalOperations || VT.isFixedLengthVector() || in tryToFoldExtOfLoad()
13347 bool LegalOperations, SDNode *N, SDValue N0, in tryToFoldExtOfMaskedLoad() argument
13356 if ((LegalOperations || !cast<MaskedLoadSDNode>(N0)->isSimple()) && in tryToFoldExtOfMaskedLoad()
13405 bool LegalOperations) { in foldExtendedSignBitTest() argument
13410 if (LegalOperations || SetCC.getOpcode() != ISD::SETCC || in foldExtendedSignBitTest()
13458 if (VT.isVector() && !LegalOperations && in foldSextSetcc()
13556 (!LegalOperations || TLI.isOperationLegal(ISD::SETCC, N00VT))) { in foldSextSetcc()
13643 if (!LegalOperations || TLI.isOperationLegal(ISD::SIGN_EXTEND_INREG, in visitSIGN_EXTEND()
13656 tryToFoldExtOfLoad(DAG, *this, TLI, VT, LegalOperations, N, N0, in visitSIGN_EXTEND()
13661 tryToFoldExtOfMaskedLoad(DAG, TLI, VT, LegalOperations, N, N0, in visitSIGN_EXTEND()
13672 DAG, *this, TLI, VT, LegalOperations, N, N0, ISD::SEXTLOAD)) in visitSIGN_EXTEND()
13685 (!LegalOperations && TLI.isOperationLegal(N0.getOpcode(), VT))) { in visitSIGN_EXTEND()
13723 if (SDValue V = foldExtendedSignBitTest(N, DAG, LegalOperations)) in visitSIGN_EXTEND()
13731 (!LegalOperations || TLI.isOperationLegal(ISD::ZERO_EXTEND, VT)) && in visitSIGN_EXTEND()
13763 (!LegalOperations || (TLI.isOperationLegal(ISD::ZERO_EXTEND, VT) && in visitSIGN_EXTEND()
13937 if (!LegalOperations || (TLI.isOperationLegal(ISD::AND, SrcVT) && in visitZERO_EXTEND()
13949 if (!LegalOperations || TLI.isOperationLegal(ISD::AND, VT)) { in visitZERO_EXTEND()
13976 DAG, *this, TLI, VT, LegalOperations, N, N0, ISD::ZEXTLOAD, in visitZERO_EXTEND()
13981 tryToFoldExtOfMaskedLoad(DAG, TLI, VT, LegalOperations, N, N0, in visitZERO_EXTEND()
14002 (!LegalOperations && TLI.isOperationLegal(N0.getOpcode(), VT))) { in visitZERO_EXTEND()
14058 DAG, *this, TLI, VT, LegalOperations, N, N0, ISD::ZEXTLOAD)) in visitZERO_EXTEND()
14061 if (SDValue V = foldExtendedSignBitTest(N, DAG, LegalOperations)) in visitZERO_EXTEND()
14069 if (!LegalOperations && VT.isVector() && in visitZERO_EXTEND()
14234 tryToFoldExtOfLoad(DAG, *this, TLI, VT, LegalOperations, N, N0, in visitANY_EXTEND()
14274 if (!LegalOperations || TLI.isLoadExtLegal(ExtType, VT, MemVT)) { in visitANY_EXTEND()
14294 if (VT.isVector() && !LegalOperations) { in visitANY_EXTEND()
14705 (!LegalOperations || TLI.isOperationLegal(ISD::SIGN_EXTEND, VT))) in visitSIGN_EXTEND_INREG()
14722 (!LegalOperations || in visitSIGN_EXTEND_INREG()
14732 (!LegalOperations || TLI.isOperationLegal(ISD::SIGN_EXTEND, VT))) in visitSIGN_EXTEND_INREG()
14772 ((!LegalOperations && cast<LoadSDNode>(N0)->isSimple() && in visitSIGN_EXTEND_INREG()
14790 ((!LegalOperations && cast<LoadSDNode>(N0)->isSimple()) && in visitSIGN_EXTEND_INREG()
14855 (!LegalOperations || in visitSIGN_EXTEND_INREG()
14869 bool LegalOperations) { in foldExtendVectorInregToExtendOfSubvector() argument
14893 if (LegalOperations && !TLI.isOperationLegal(Opcode, VT)) in foldExtendVectorInregToExtendOfSubvector()
14919 LegalOperations)) in visitEXTEND_VECTOR_INREG()
14987 LegalTypes && !LegalOperations && N0->hasOneUse() && VT != MVT::i1) { in visitTRUNCATE()
15011 if ((!LegalOperations || TLI.isOperationLegal(ISD::SELECT, SrcVT)) && in visitTRUNCATE()
15023 (!LegalOperations || TLI.isOperationLegal(ISD::SHL, VT)) && in visitTRUNCATE()
15046 if (N0.getOpcode() == ISD::BUILD_VECTOR && !LegalOperations && in visitTRUNCATE()
15063 (!LegalOperations || TLI.isOperationLegal(ISD::SPLAT_VECTOR, VT))) { in visitTRUNCATE()
15170 (!LegalOperations || in visitTRUNCATE()
15212 if (!LegalOperations && N0.hasOneUse() && in visitTRUNCATE()
15232 if (((!LegalOperations && N0.getOpcode() == ISD::UADDO_CARRY) || in visitTRUNCATE()
15245 if (!LegalOperations && N0.hasOneUse() && in visitTRUNCATE()
15288 if ((!LegalOperations || TLI.isOperationLegal(ISD::LOAD, VT)) && in CombineConsecutiveLoads()
15339 if (LegalOperations && !TLI.isOperationLegal(FPOpcode, VT)) in foldBitcastedFPLogic()
15386 (!LegalOperations && VT.isInteger() && N0.getValueType().isInteger() && in visitBITCAST()
15398 if (!LegalOperations || in visitBITCAST()
15440 ((!LegalOperations && cast<LoadSDNode>(N0)->isSimple()) || in visitBITCAST()
15876 bool HasFMAD = !UseVP && (LegalOperations && TLI.isFMADLegal(DAG, N)); in visitFADDForFMACombine()
15881 (!LegalOperations || matcher.isOperationLegalOrCustom(ISD::FMA, VT)); in visitFADDForFMACombine()
16113 bool HasFMAD = !UseVP && (LegalOperations && TLI.isFMADLegal(DAG, N)); in visitFSUBForFMACombine()
16118 (!LegalOperations || matcher.isOperationLegalOrCustom(ISD::FMA, VT)); in visitFSUBForFMACombine()
16449 (!LegalOperations || TLI.isOperationLegalOrCustom(ISD::FMA, VT)); in visitFMULForFMADistributiveCombine()
16454 (LegalOperations && TLI.isFMADLegal(DAG, N)); in visitFMULForFMADistributiveCombine()
16570 if (!LegalOperations || TLI.isOperationLegalOrCustom(ISD::FSUB, VT)) in visitFADD()
16572 N1, DAG, LegalOperations, ForCodeSize)) in visitFADD()
16576 if (!LegalOperations || TLI.isOperationLegalOrCustom(ISD::FSUB, VT)) in visitFADD()
16578 N0, DAG, LegalOperations, ForCodeSize)) in visitFADD()
16736 if (!LegalOperations || TLI.isOperationLegalOrCustom(ISD::STRICT_FSUB, VT)) in visitSTRICT_FADD()
16738 N1, DAG, LegalOperations, ForCodeSize)) { in visitSTRICT_FADD()
16744 if (!LegalOperations || TLI.isOperationLegalOrCustom(ISD::STRICT_FSUB, VT)) in visitSTRICT_FADD()
16746 N0, DAG, LegalOperations, ForCodeSize)) { in visitSTRICT_FADD()
16804 TLI.getNegatedExpression(N1, DAG, LegalOperations, ForCodeSize)) in visitFSUB()
16806 if (!LegalOperations || TLI.isOperationLegal(ISD::FNEG, VT)) in visitFSUB()
16825 TLI.getNegatedExpression(N1, DAG, LegalOperations, ForCodeSize)) in visitFSUB()
17009 if (!LegalOperations || TLI.isOperationLegal(ISD::FSUB, VT)) { in visitFMUL()
17021 TLI.getNegatedExpression(N0, DAG, LegalOperations, ForCodeSize, CostN0); in visitFMUL()
17025 TLI.getNegatedExpression(N1, DAG, LegalOperations, ForCodeSize, CostN1); in visitFMUL()
17117 TLI.getNegatedExpression(N0, DAG, LegalOperations, ForCodeSize, CostN0); in visitFMA()
17121 TLI.getNegatedExpression(N1, DAG, LegalOperations, ForCodeSize, CostN1); in visitFMA()
17175 (!LegalOperations || TLI.isOperationLegal(ISD::FNEG, VT))) { in visitFMA()
17212 SDValue(N, 0), DAG, LegalOperations, ForCodeSize)) in visitFMA()
17351 (!LegalOperations || in visitFDIV()
17446 TLI.getNegatedExpression(N0, DAG, LegalOperations, ForCodeSize, CostN0); in visitFDIV()
17450 TLI.getNegatedExpression(N1, DAG, LegalOperations, ForCodeSize, CostN1); in visitFDIV()
17570 if (!LegalOperations || TLI.isOperationLegal(ISD::FABS, VT)) in visitFCOPYSIGN()
17573 if (!LegalOperations || TLI.isOperationLegal(ISD::FNEG, VT)) in visitFCOPYSIGN()
17729 (!LegalOperations || in visitSINT_TO_FP()
17746 (!LegalOperations || TLI.isOperationLegalOrCustom(ISD::ConstantFP, VT))) { in visitSINT_TO_FP()
17756 (!LegalOperations || TLI.isOperationLegalOrCustom(ISD::ConstantFP, VT))) { in visitSINT_TO_FP()
17781 (!LegalOperations || in visitUINT_TO_FP()
17796 (!LegalOperations || TLI.isOperationLegalOrCustom(ISD::ConstantFP, VT))) { in visitUINT_TO_FP()
18085 TLI.getNegatedExpression(N0, DAG, LegalOperations, ForCodeSize)) in visitFNEG()
21301 if ((isTypeLegal(MVT::i32) && !LegalOperations && ST->isSimple()) || in replaceStoreOfFPConstant()
21311 if ((TLI.isTypeLegal(MVT::i64) && !LegalOperations && in replaceStoreOfFPConstant()
21439 if (((!LegalOperations && ST->isSimple()) || in visitSTORE()
21617 ST->getMemoryVT(), LegalOperations)) { in visitSTORE()
22146 if (!LegalOperations || TLI.isOperationLegal(ISD::BUILD_VECTOR, VT)) { in visitINSERT_VECTOR_ELT()
22242 if (!LegalOperations && llvm::isNullConstant(InVal) && in visitINSERT_VECTOR_ELT()
22357 const SDLoc &DL, bool LegalOperations) { in scalarizeExtractedBinop() argument
22534 if (LegalOperations && in refineExtractVectorEltIntoMultipleNarrowExtractVectorElts()
22620 if (SDValue BO = scalarizeExtractedBinop(N, DAG, DL, LegalOperations)) in visitEXTRACT_VECTOR_ELT()
22718 if (!LegalOperations || in visitEXTRACT_VECTOR_ELT()
22784 if (!LegalOperations && !IndexC && VecOp.hasOneUse() && in visitEXTRACT_VECTOR_ELT()
22794 if (!LegalOperations || !IndexC) in visitEXTRACT_VECTOR_ELT()
23141 if (LegalOperations && in createBuildVecShuffle()
23175 if (LegalOperations && !TLI.isOperationLegal(ISD::VECTOR_SHUFFLE, InVT1)) in createBuildVecShuffle()
23325 if (LegalOperations && !TLI.isOperationLegal(ISD::VECTOR_SHUFFLE, VT)) in reduceBuildVecToShuffle()
23574 if (LegalOperations) in convertBuildVecZextToZext()
23645 (LegalOperations && !TLI.isOperationLegalOrCustom(ISD::BITCAST, OpIntVT))) in convertBuildVecZextToBuildVecWithZeros()
23708 (LegalOperations && in convertBuildVecZextToBuildVecWithZeros()
23758 if (!LegalOperations) { in visitBUILD_VECTOR()
24076 bool LegalOperations) { in combineConcatVectorOfShuffleAndItsOperands() argument
24088 (LegalOperations && in combineConcatVectorOfShuffleAndItsOperands()
24209 if (!LegalOperations && Scalar.getOpcode() == ISD::SCALAR_TO_VECTOR && in visitCONCAT_VECTORS()
24316 N, DAG, TLI, LegalTypes, LegalOperations)) in visitCONCAT_VECTORS()
24384 bool LegalOperations) { in narrowInsertExtractVectorBinOp() argument
24398 if (!TLI.isOperationLegalOrCustom(BinOpcode, SubVT, LegalOperations)) in narrowInsertExtractVectorBinOp()
24420 bool LegalOperations) { in narrowExtractedVectorBinOp() argument
24424 if (SDValue V = narrowInsertExtractVectorBinOp(Extract, DAG, LegalOperations)) in narrowExtractedVectorBinOp()
24479 LegalOperations)) in narrowExtractedVectorBinOp()
24619 bool LegalOperations) { in foldExtractSubvectorFromShuffleVector() argument
24641 if (LegalOperations && in foldExtractSubvectorFromShuffleVector()
24791 if (!LegalOperations || TLI.isOperationLegal(ISD::SPLAT_VECTOR, NVT)) in visitEXTRACT_SUBVECTOR()
24815 (!LegalOperations || TLI.isOperationLegal(ISD::BITCAST, NVT))) { in visitEXTRACT_SUBVECTOR()
24898 foldExtractSubvectorFromShuffleVector(N, DAG, TLI, LegalOperations)) in visitEXTRACT_SUBVECTOR()
24951 if (LegalOperations && !TLI.isOperationLegal(ISD::BITCAST, NVT)) in visitEXTRACT_SUBVECTOR()
24962 if (SDValue NarrowBOp = narrowExtractedVectorBinOp(N, DAG, LegalOperations)) in visitEXTRACT_SUBVECTOR()
25188 bool LegalOperations) { in canCombineShuffleToExtendVectorInreg() argument
25210 (LegalOperations && !TLI.isOperationLegalOrCustom(Opcode, OutVT))) in canCombineShuffleToExtendVectorInreg()
25226 bool LegalOperations) { in combineShuffleToAnyExtendVectorInreg() argument
25252 Opcode, VT, isAnyExtend, DAG, TLI, /*LegalTypes=*/true, LegalOperations); in combineShuffleToAnyExtendVectorInreg()
25264 bool LegalOperations) { in combineShuffleToZeroExtendVectorInReg() argument
25374 LegalOperations); in combineShuffleToZeroExtendVectorInReg()
25551 bool LegalOperations) { in combineShuffleOfBitcast() argument
25569 (LegalOperations && in combineShuffleOfBitcast()
25822 if ((!LegalOperations || TLI.isOperationLegal(ISD::BUILD_VECTOR, VT)) && in visitVECTOR_SHUFFLE()
25909 combineShuffleToAnyExtendVectorInreg(SVN, DAG, TLI, LegalOperations)) in visitVECTOR_SHUFFLE()
26130 if (SDValue V = combineShuffleOfBitcast(SVN, DAG, TLI, LegalOperations)) in visitVECTOR_SHUFFLE()
26397 LegalOperations)) in visitVECTOR_SHUFFLE()
26938 if (LegalOperations) in XformToShuffleWithZero()
27164 LegalOperations)) { in SimplifyVBinOp()
27726 (!LegalOperations || TLI.isOperationLegal(ISD::SETCC, CmpOpVT))) { in SimplifySelectCC()
27786 (!LegalOperations || TLI.isOperationLegal(ISD::CTTZ, VT))) in SimplifySelectCC()
27793 (!LegalOperations || TLI.isOperationLegal(ISD::CTLZ, VT))) in SimplifySelectCC()
27841 if (SDValue S = TLI.BuildSDIV(N, DAG, LegalOperations, Built)) { in BuildSDIV()
27882 if (SDValue S = TLI.BuildUDIV(N, DAG, LegalOperations, Built)) { in BuildUDIV()