Lines Matching refs:HandOpcode
5764 unsigned HandOpcode = N0.getOpcode(); in hoistLogicOpWithSameOpcodeHands() local
5766 assert(HandOpcode == N1.getOpcode() && "Bad input!"); in hoistLogicOpWithSameOpcodeHands()
5780 if (ISD::isExtOpcode(HandOpcode) || ISD::isExtVecInRegOpcode(HandOpcode) || in hoistLogicOpWithSameOpcodeHands()
5781 (HandOpcode == ISD::SIGN_EXTEND_INREG && in hoistLogicOpWithSameOpcodeHands()
5797 if ((HandOpcode == ISD::ANY_EXTEND || in hoistLogicOpWithSameOpcodeHands()
5798 HandOpcode == ISD::ANY_EXTEND_VECTOR_INREG) && in hoistLogicOpWithSameOpcodeHands()
5803 if (HandOpcode == ISD::SIGN_EXTEND_INREG) in hoistLogicOpWithSameOpcodeHands()
5804 return DAG.getNode(HandOpcode, DL, VT, Logic, N0.getOperand(1)); in hoistLogicOpWithSameOpcodeHands()
5805 return DAG.getNode(HandOpcode, DL, VT, Logic); in hoistLogicOpWithSameOpcodeHands()
5809 if (HandOpcode == ISD::TRUNCATE) { in hoistLogicOpWithSameOpcodeHands()
5827 return DAG.getNode(HandOpcode, DL, VT, Logic); in hoistLogicOpWithSameOpcodeHands()
5832 if ((HandOpcode == ISD::SHL || HandOpcode == ISD::SRL || in hoistLogicOpWithSameOpcodeHands()
5833 HandOpcode == ISD::SRA || HandOpcode == ISD::AND) && in hoistLogicOpWithSameOpcodeHands()
5839 return DAG.getNode(HandOpcode, DL, VT, Logic, N0.getOperand(1)); in hoistLogicOpWithSameOpcodeHands()
5843 if (HandOpcode == ISD::BSWAP) { in hoistLogicOpWithSameOpcodeHands()
5848 return DAG.getNode(HandOpcode, DL, VT, Logic); in hoistLogicOpWithSameOpcodeHands()
5854 if ((HandOpcode == ISD::FSHL || HandOpcode == ISD::FSHR) && in hoistLogicOpWithSameOpcodeHands()
5863 return DAG.getNode(HandOpcode, DL, VT, Logic0, Logic1, S); in hoistLogicOpWithSameOpcodeHands()
5873 if ((HandOpcode == ISD::BITCAST || HandOpcode == ISD::SCALAR_TO_VECTOR) && in hoistLogicOpWithSameOpcodeHands()
5880 return DAG.getNode(HandOpcode, DL, VT, Logic); in hoistLogicOpWithSameOpcodeHands()
5896 if (HandOpcode == ISD::VECTOR_SHUFFLE && Level < AfterLegalizeDAG) { in hoistLogicOpWithSameOpcodeHands()