Lines Matching refs:Dep
263 SDep Dep; in addPhysRegDataDeps() local
265 Dep = SDep(SU, SDep::Artificial); in addPhysRegDataDeps()
277 Dep = SDep(SU, SDep::Data, UseReg); in addPhysRegDataDeps()
280 Dep.setLatency(SchedModel.computeOperandLatency(SU->getInstr(), OperIdx, in addPhysRegDataDeps()
283 Dep.setLatency(0); in addPhysRegDataDeps()
285 ST.adjustSchedDependency(SU, OperIdx, UseSU, UseOpIdx, Dep, &SchedModel); in addPhysRegDataDeps()
286 UseSU->addPred(Dep); in addPhysRegDataDeps()
321 SDep Dep(SU, Kind, DefMO.getReg()); in addPhysRegDeps() local
323 Dep.setLatency( in addPhysRegDeps()
326 ST.adjustSchedDependency(SU, OperIdx, DefSU, I->OpIdx, Dep, in addPhysRegDeps()
328 DefSU->addPred(Dep); in addPhysRegDeps()
454 SDep Dep(SU, SDep::Data, Reg); in addVRegDefDeps() local
455 Dep.setLatency(SchedModel.computeOperandLatency(MI, OperIdx, Use, in addVRegDefDeps()
457 ST.adjustSchedDependency(SU, OperIdx, UseSU, I->OperandIndex, Dep, in addVRegDefDeps()
459 UseSU->addPred(Dep); in addVRegDefDeps()
498 SDep Dep(SU, SDep::Output, Reg); in addVRegDefDeps() local
499 Dep.setLatency( in addVRegDefDeps()
501 DefSU->addPred(Dep); in addVRegDefDeps()
560 SDep Dep(SUa, SDep::MayAliasMem); in addChainDependency() local
561 Dep.setLatency(Latency); in addChainDependency()
562 SUb->addPred(Dep); in addChainDependency()
892 SDep Dep(SU, SDep::Artificial); in buildSchedGraph() local
893 Dep.setLatency(SU->Latency - 1); in buildSchedGraph()
894 ExitSU.addPred(Dep); in buildSchedGraph()