Lines Matching refs:RegOpers
465 RegisterOperands &RegOpers; member in __anondcf0e0b20611::RegisterOperandsCollector
470 RegisterOperandsCollector(RegisterOperands &RegOpers, in RegisterOperandsCollector() argument
473 : RegOpers(RegOpers), TRI(TRI), MRI(MRI), IgnoreDead(IgnoreDead) {} in RegisterOperandsCollector()
480 for (const VRegMaskOrUnit &P : RegOpers.Defs) in collectInstr()
481 removeRegLanes(RegOpers.DeadDefs, P); in collectInstr()
489 for (const VRegMaskOrUnit &P : RegOpers.Defs) in collectInstrLanes()
490 removeRegLanes(RegOpers.DeadDefs, P); in collectInstrLanes()
500 pushReg(Reg, RegOpers.Uses); in collectOperand()
505 pushReg(Reg, RegOpers.Uses); in collectOperand()
509 pushReg(Reg, RegOpers.DeadDefs); in collectOperand()
511 pushReg(Reg, RegOpers.Defs); in collectOperand()
531 pushRegLanes(Reg, SubRegIdx, RegOpers.Uses); in collectOperandLanes()
540 pushRegLanes(Reg, SubRegIdx, RegOpers.DeadDefs); in collectOperandLanes()
542 pushRegLanes(Reg, SubRegIdx, RegOpers.Defs); in collectOperandLanes()
646 const RegisterOperands &RegOpers, in addInstruction() argument
650 for (const VRegMaskOrUnit &P : RegOpers.Defs) in addInstruction()
653 for (const VRegMaskOrUnit &P : RegOpers.Uses) in addInstruction()
751 void RegPressureTracker::recede(const RegisterOperands &RegOpers, in recede() argument
756 bumpDeadDefs(RegOpers.DeadDefs); in recede()
760 for (const VRegMaskOrUnit &Def : RegOpers.Defs) { in recede()
790 for (const VRegMaskOrUnit &Use : RegOpers.Uses) { in recede()
829 for (const VRegMaskOrUnit &Def : RegOpers.Defs) { in recede()
869 RegisterOperands RegOpers; in recede() local
870 RegOpers.collect(MI, *TRI, *MRI, TrackLaneMasks, /*IgnoreDead=*/false); in recede()
873 RegOpers.adjustLaneLiveness(*LIS, *MRI, SlotIdx); in recede()
875 RegOpers.detectDeadDefs(MI, *LIS); in recede()
878 recede(RegOpers, LiveUses); in recede()
882 void RegPressureTracker::advance(const RegisterOperands &RegOpers) { in advance() argument
900 for (const VRegMaskOrUnit &Use : RegOpers.Uses) { in advance()
920 for (const VRegMaskOrUnit &Def : RegOpers.Defs) { in advance()
927 bumpDeadDefs(RegOpers.DeadDefs); in advance()
935 RegisterOperands RegOpers; in advance() local
936 RegOpers.collect(MI, *TRI, *MRI, TrackLaneMasks, false); in advance()
939 RegOpers.adjustLaneLiveness(*LIS, *MRI, SlotIdx); in advance()
941 advance(RegOpers); in advance()
1036 RegisterOperands RegOpers; in bumpUpwardPressure() local
1037 RegOpers.collect(*MI, *TRI, *MRI, TrackLaneMasks, /*IgnoreDead=*/true); in bumpUpwardPressure()
1038 assert(RegOpers.DeadDefs.empty()); in bumpUpwardPressure()
1040 RegOpers.adjustLaneLiveness(*LIS, *MRI, SlotIdx); in bumpUpwardPressure()
1042 RegOpers.detectDeadDefs(*MI, *LIS); in bumpUpwardPressure()
1046 bumpDeadDefs(RegOpers.DeadDefs); in bumpUpwardPressure()
1049 for (const VRegMaskOrUnit &P : RegOpers.Defs) { in bumpUpwardPressure()
1052 LaneBitmask UseLanes = getRegLanes(RegOpers.Uses, Reg); in bumpUpwardPressure()
1061 for (const VRegMaskOrUnit &P : RegOpers.Uses) { in bumpUpwardPressure()
1280 RegisterOperands RegOpers; in bumpDownwardPressure() local
1281 RegOpers.collect(*MI, *TRI, *MRI, TrackLaneMasks, /*IgnoreDead=*/false); in bumpDownwardPressure()
1283 RegOpers.adjustLaneLiveness(*LIS, *MRI, SlotIdx); in bumpDownwardPressure()
1286 for (const VRegMaskOrUnit &Use : RegOpers.Uses) { in bumpDownwardPressure()
1309 for (const VRegMaskOrUnit &Def : RegOpers.Defs) { in bumpDownwardPressure()
1317 bumpDeadDefs(RegOpers.DeadDefs); in bumpDownwardPressure()