Lines Matching refs:UseIdx

318     void addUndefFlag(const LiveInterval &Int, SlotIndex UseIdx,
886 SlotIndex UseIdx = LIS->getInstructionIndex(*UseMI); in removeCopyByCommutingDef() local
887 LiveInterval::iterator US = IntA.FindSegmentContaining(UseIdx); in removeCopyByCommutingDef()
936 SlotIndex UseIdx = LIS->getInstructionIndex(*UseMI).getRegSlot(true); in removeCopyByCommutingDef() local
937 LiveInterval::iterator US = IntA.FindSegmentContaining(UseIdx); in removeCopyByCommutingDef()
957 SlotIndex DefIdx = UseIdx.getRegSlot(); in removeCopyByCommutingDef()
1228 SlotIndex UseIdx = LIS->getInstructionIndex(MI); in removePartialRedundancy() local
1229 if (!IntB.liveAt(UseIdx)) in removePartialRedundancy()
1756 SlotIndex UseIdx = LIS->getInstructionIndex(MI); in eliminateUndefCopy() local
1764 if (SR.liveAt(UseIdx)) { in eliminateUndefCopy()
1770 isLive = DstLI.liveAt(UseIdx); in eliminateUndefCopy()
1774 LLVM_DEBUG(dbgs() << "\tnew undef: " << UseIdx << '\t' << MI); in eliminateUndefCopy()
1790 void RegisterCoalescer::addUndefFlag(const LiveInterval &Int, SlotIndex UseIdx, in addUndefFlag() argument
1799 if (S.liveAt(UseIdx)) { in addUndefFlag()
1810 LiveQueryResult Q = Int.Query(UseIdx); in addUndefFlag()
1829 SlotIndex UseIdx = LIS->getInstructionIndex(MI).getRegSlot(true); in updateRegDefsUses() local
1830 addUndefFlag(*DstInt, UseIdx, MO, SubReg); in updateRegDefsUses()
1887 SlotIndex UseIdx = MIIdx.getRegSlot(true); in updateRegDefsUses() local
1888 addUndefFlag(*DstInt, UseIdx, MO, SubUseIdx); in updateRegDefsUses()