454   SrcIdx = DstIdx = 0;  in setRegisters()
502                                          SrcIdx, DstIdx);  in setRegisters()
507       SrcIdx = DstSub;  in setRegisters()
524     if (DstIdx && !SrcIdx) {  in setRegisters()
526       std::swap(SrcIdx, DstIdx);  in setRegisters()
544   std::swap(SrcIdx, DstIdx);  in flip()
569     assert(!DstIdx && !SrcIdx && "Inconsistent CoalescerPair state.");  in isCoalescable()
583     return TRI.composeSubRegIndices(SrcIdx, SrcSub) ==  in isCoalescable()
1292   unsigned SrcIdx = CP.isFlipped() ? CP.getDstIdx() : CP.getSrcIdx();  in reMaterializeTrivialDef()  local
1339   if (SrcIdx && DstIdx)  in reMaterializeTrivialDef()
1373   Edit.rematerializeAt(*MBB, MII, DstReg, RM, *TRI, false, SrcIdx, CopyMI);  in reMaterializeTrivialDef()
1386       assert(SrcIdx == 0 && CP.isFlipped()  in reMaterializeTrivialDef()
1983     unsigned SrcIdx = CP.getSrcIdx();  in joinCopy()  local
1986       std::swap(SrcIdx, DstIdx);  in joinCopy()
1989     if (!TRI->shouldCoalesce(CopyMI, SrcRC, SrcIdx, DstRC, DstIdx,  in joinCopy()
3656     unsigned SrcIdx = CP.getSrcIdx();  in joinVirtRegs()  local
3658       LaneBitmask Mask = SrcIdx == 0 ? CP.getNewRC()->getLaneMask()  in joinVirtRegs()
3659                                      : TRI->getSubRegIndexLaneMask(SrcIdx);  in joinVirtRegs()
3664         LaneBitmask Mask = TRI->composeSubRegIndexLaneMask(SrcIdx, R.LaneMask);  in joinVirtRegs()