901   MachineInstr *NewMI =  in removeCopyByCommutingDef()  local
903   if (!NewMI)  in removeCopyByCommutingDef()
908   if (NewMI != DefMI) {  in removeCopyByCommutingDef()
909     LIS->ReplaceMachineInstrInMaps(*DefMI, *NewMI);  in removeCopyByCommutingDef()
911     MBB->insert(Pos, NewMI);  in removeCopyByCommutingDef()
1374   MachineInstr &NewMI = *std::prev(MII);  in reMaterializeTrivialDef()  local
1375   NewMI.setDebugLoc(DL);  in reMaterializeTrivialDef()
1384     MachineOperand &DefMO = NewMI.getOperand(0);  in reMaterializeTrivialDef()
1398         for (MachineOperand &MO : NewMI.operands()) {  in reMaterializeTrivialDef()
1446   for (unsigned i = NewMI.getDesc().getNumOperands(),  in reMaterializeTrivialDef()
1447                 e = NewMI.getNumOperands();  in reMaterializeTrivialDef()
1449     MachineOperand &MO = NewMI.getOperand(i);  in reMaterializeTrivialDef()
1460                    MCRegister((unsigned)NewMI.getOperand(0).getReg())) ||  in reMaterializeTrivialDef()
1461                   TRI->isSubRegisterEq(NewMI.getOperand(0).getReg(),  in reMaterializeTrivialDef()
1465         assert(MO.getReg() == NewMI.getOperand(0).getReg());  in reMaterializeTrivialDef()
1480     unsigned NewIdx = NewMI.getOperand(0).getSubReg();  in reMaterializeTrivialDef()
1498     NewMI.getOperand(0).setSubReg(NewIdx);  in reMaterializeTrivialDef()
1503       NewMI.getOperand(0).setIsUndef(false);  in reMaterializeTrivialDef()
1519       SlotIndex CurrIdx = LIS->getInstructionIndex(NewMI);  in reMaterializeTrivialDef()
1521           CurrIdx.getRegSlot(NewMI.getOperand(0).isEarlyClobber());  in reMaterializeTrivialDef()
1545       SlotIndex CurrIdx = LIS->getInstructionIndex(NewMI);  in reMaterializeTrivialDef()
1549           CurrIdx.getRegSlot(NewMI.getOperand(0).isEarlyClobber());  in reMaterializeTrivialDef()
1581   } else if (NewMI.getOperand(0).getReg() != CopyDstReg) {  in reMaterializeTrivialDef()
1586     NewMI.getOperand(0).setIsDead(true);  in reMaterializeTrivialDef()
1589       NewMI.addOperand(MachineOperand::CreateReg(  in reMaterializeTrivialDef()
1609     SlotIndex NewMIIdx = LIS->getInstructionIndex(NewMI);  in reMaterializeTrivialDef()
1610     for (MCRegUnit Unit : TRI->regunits(NewMI.getOperand(0).getReg()))  in reMaterializeTrivialDef()
1615   NewMI.setRegisterDefReadUndef(NewMI.getOperand(0).getReg());  in reMaterializeTrivialDef()
1619     NewMI.addOperand(MO);  in reMaterializeTrivialDef()
1621   SlotIndex NewMIIdx = LIS->getInstructionIndex(NewMI);  in reMaterializeTrivialDef()
1628   LLVM_DEBUG(dbgs() << "Remat: " << NewMI);  in reMaterializeTrivialDef()
1644         MBB->splice(std::next(NewMI.getIterator()), UseMI->getParent(), UseMI);  in reMaterializeTrivialDef()