265                            unsigned DstIdx);
454   SrcIdx = DstIdx = 0;  in setRegisters()
502                                          SrcIdx, DstIdx);  in setRegisters()
511       DstIdx = SrcSub;  in setRegisters()
524     if (DstIdx && !SrcIdx) {  in setRegisters()
526       std::swap(SrcIdx, DstIdx);  in setRegisters()
544   std::swap(SrcIdx, DstIdx);  in flip()
569     assert(!DstIdx && !SrcIdx && "Inconsistent CoalescerPair state.");  in isCoalescable()
584            TRI.composeSubRegIndices(DstIdx, DstSub);  in isCoalescable()
1294   unsigned DstIdx = CP.isFlipped() ? CP.getSrcIdx() : CP.getDstIdx();  in reMaterializeTrivialDef()  local
1339   if (SrcIdx && DstIdx)  in reMaterializeTrivialDef()
1383   if (DstIdx != 0) {  in reMaterializeTrivialDef()
1385     if (DefMO.getSubReg() == DstIdx) {  in reMaterializeTrivialDef()
1399           if (MO.isReg() && MO.getReg() == DstReg && MO.getSubReg() == DstIdx) {  in reMaterializeTrivialDef()
1404         DstIdx = 0;  in reMaterializeTrivialDef()
1492       SR.LaneMask = TRI->composeSubRegIndexLaneMask(DstIdx, SR.LaneMask);  in reMaterializeTrivialDef()
1497     updateRegDefsUses(DstReg, DstReg, DstIdx);  in reMaterializeTrivialDef()
1984     unsigned DstIdx = CP.getDstIdx();  in joinCopy()  local
1986       std::swap(SrcIdx, DstIdx);  in joinCopy()
1989     if (!TRI->shouldCoalesce(CopyMI, SrcRC, SrcIdx, DstRC, DstIdx,  in joinCopy()
3638     unsigned DstIdx = CP.getDstIdx();  in joinVirtRegs()  local
3640       LaneBitmask Mask = DstIdx == 0 ? CP.getNewRC()->getLaneMask()  in joinVirtRegs()
3641                                      : TRI->getSubRegIndexLaneMask(DstIdx);  in joinVirtRegs()
3645     } else if (DstIdx != 0) {  in joinVirtRegs()
3648         LaneBitmask Mask = TRI->composeSubRegIndexLaneMask(DstIdx, R.LaneMask);  in joinVirtRegs()
3660       mergeSubRangeInto(LHS, RHS, Mask, CP, DstIdx);  in joinVirtRegs()
3665         mergeSubRangeInto(LHS, R, Mask, CP, DstIdx);  in joinVirtRegs()