Lines Matching refs:LRI
732 LiveRegMap::iterator LRI = findLiveVirtReg(VirtReg); in displacePhysReg() local
733 assert(LRI != LiveVirtRegs.end() && "datastructures in sync"); in displacePhysReg()
736 reload(ReloadBefore, VirtReg, LRI->PhysReg); in displacePhysReg()
738 setPhysRegState(LRI->PhysReg, regFree); in displacePhysReg()
739 LRI->PhysReg = 0; in displacePhysReg()
740 LRI->Reloaded = true; in displacePhysReg()
768 LiveRegMap::iterator LRI = findLiveVirtReg(VirtReg); in freePhysReg() local
769 assert(LRI != LiveVirtRegs.end()); in freePhysReg()
770 LLVM_DEBUG(dbgs() << ' ' << printReg(LRI->VirtReg, TRI) << '\n'); in freePhysReg()
771 setPhysRegState(LRI->PhysReg, regFree); in freePhysReg()
772 LRI->PhysReg = 0; in freePhysReg()
987 LiveRegMap::const_iterator LRI = findLiveVirtReg(VirtReg); in allocVirtRegUndef() local
989 if (LRI != LiveVirtRegs.end() && LRI->PhysReg) { in allocVirtRegUndef()
990 PhysReg = LRI->PhysReg; in allocVirtRegUndef()
1015 LiveRegMap::iterator LRI = findLiveVirtReg(VirtReg); in defineLiveThroughVirtReg() local
1016 if (LRI != LiveVirtRegs.end()) { in defineLiveThroughVirtReg()
1017 MCPhysReg PrevReg = LRI->PhysReg; in defineLiveThroughVirtReg()
1022 LRI->PhysReg = 0; in defineLiveThroughVirtReg()
1023 allocVirtReg(MI, *LRI, 0, true); in defineLiveThroughVirtReg()
1026 LLVM_DEBUG(dbgs() << "Copy " << printReg(LRI->PhysReg, TRI) << " to " in defineLiveThroughVirtReg()
1030 .addReg(LRI->PhysReg, llvm::RegState::Kill); in defineLiveThroughVirtReg()
1034 LRI->LastUse = &MI; in defineLiveThroughVirtReg()
1053 LiveRegMap::iterator LRI; in defineVirtReg() local
1055 std::tie(LRI, New) = LiveVirtRegs.insert(LiveReg(VirtReg)); in defineVirtReg()
1059 LRI->LiveOut = true; in defineVirtReg()
1066 if (LRI->PhysReg == 0) { in defineVirtReg()
1067 allocVirtReg(MI, *LRI, 0, LookAtPhysRegUses); in defineVirtReg()
1070 if (LRI->Error) { in defineVirtReg()
1078 assert(!isRegUsedInInstr(LRI->PhysReg, LookAtPhysRegUses) && in defineVirtReg()
1082 << printReg(LRI->PhysReg, TRI) << '\n'); in defineVirtReg()
1085 MCPhysReg PhysReg = LRI->PhysReg; in defineVirtReg()
1086 if (LRI->Reloaded || LRI->LiveOut) { in defineVirtReg()
1090 LLVM_DEBUG(dbgs() << "Spill Reason: LO: " << LRI->LiveOut in defineVirtReg()
1091 << " RL: " << LRI->Reloaded << '\n'); in defineVirtReg()
1092 bool Kill = LRI->LastUse == nullptr; in defineVirtReg()
1093 spill(SpillBefore, VirtReg, PhysReg, Kill, LRI->LiveOut); in defineVirtReg()
1111 LRI->LastUse = nullptr; in defineVirtReg()
1113 LRI->LiveOut = false; in defineVirtReg()
1114 LRI->Reloaded = false; in defineVirtReg()
1130 LiveRegMap::iterator LRI; in useVirtReg() local
1132 std::tie(LRI, New) = LiveVirtRegs.insert(LiveReg(VirtReg)); in useVirtReg()
1136 LRI->LiveOut = true; in useVirtReg()
1143 assert((!MO.isKill() || LRI->LastUse == &MI) && "Invalid kill flag"); in useVirtReg()
1147 if (LRI->PhysReg == 0) { in useVirtReg()
1160 allocVirtReg(MI, *LRI, Hint, false); in useVirtReg()
1161 if (LRI->Error) { in useVirtReg()
1170 LRI->LastUse = &MI; in useVirtReg()
1173 BundleVirtRegsMap[VirtReg] = LRI->PhysReg; in useVirtReg()
1175 markRegUsedInInstr(LRI->PhysReg); in useVirtReg()
1176 return setPhysReg(MI, MO, LRI->PhysReg); in useVirtReg()
1671 LiveRegMap::iterator LRI = findLiveVirtReg(Reg); in handleDebugValue() local
1676 if (LRI != LiveVirtRegs.end() && LRI->PhysReg) { in handleDebugValue()
1679 setPhysReg(MI, *RegMO, LRI->PhysReg); in handleDebugValue()