Lines Matching refs:RegisterRef

100 bool PhysicalRegisterInfo::alias(RegisterRef RA, RegisterRef RB) const {
107   assert(!RegisterRef::isUnitId(Reg) && "No units allowed");
108   if (RegisterRef::isMaskId(Reg)) {
119   assert(RegisterRef::isRegId(Reg));
126 std::set<RegisterId> PhysicalRegisterInfo::getUnits(RegisterRef RR) const {
165 RegisterRef PhysicalRegisterInfo::mapTo(RegisterRef RR, unsigned R) const {
169     return RegisterRef(R, TRI.composeSubRegIndexLaneMask(Idx, RR.Mask));
175     return RegisterRef(R, M & RCM);
180 bool PhysicalRegisterInfo::equal_to(RegisterRef A, RegisterRef B) const {
216 bool PhysicalRegisterInfo::less(RegisterRef A, RegisterRef B) const {
254 void PhysicalRegisterInfo::print(raw_ostream &OS, RegisterRef A) const {
279 bool RegisterAggr::hasAliasOf(RegisterRef RR) const {
292 bool RegisterAggr::hasCoverOf(RegisterRef RR) const {
307 RegisterAggr &RegisterAggr::insert(RegisterRef RR) {
326 RegisterAggr &RegisterAggr::intersect(RegisterRef RR) {
335 RegisterAggr &RegisterAggr::clear(RegisterRef RR) {
344 RegisterRef RegisterAggr::intersectWith(RegisterRef RR) const {
348     return RegisterRef();
349   RegisterRef NR = T.makeRegRef();
354 RegisterRef RegisterAggr::clearIn(RegisterRef RR) const {
358 RegisterRef RegisterAggr::makeRegRef() const {
361     return RegisterRef();
383     return RegisterRef();
391   return RegisterRef(F, M);
397     RegisterRef R = RG.PRI.getRefForUnit(U);