537     Register SrcReg = MPhi->getOperand(i * 2 + 1).getReg();  in LowerPHINode()  local
540                     isImplicitlyDefined(SrcReg, *MRI);  in LowerPHINode()
541     assert(SrcReg.isVirtual() &&  in LowerPHINode()
554     MachineInstr *SrcRegDef = MRI->getVRegDef(SrcReg);  in LowerPHINode()
561       assert(MRI->use_empty(SrcReg) &&  in LowerPHINode()
567         LiveVariables::VarInfo &SrcVI = LV->getVarInfo(SrcReg);  in LowerPHINode()
579         findPHICopyInsertPoint(&opBlock, &MBB, SrcReg);  in LowerPHINode()
593         if (MachineInstr *DefMI = MRI->getVRegDef(SrcReg))  in LowerPHINode()
600                                                SrcReg, SrcSubReg, IncomingReg);  in LowerPHINode()
608         !VRegPHIUseCount[BBVRegPair(opBlock.getNumber(), SrcReg)] &&  in LowerPHINode()
609         !LV->isLiveOut(SrcReg, opBlock)) {  in LowerPHINode()
629         if (Term->readsRegister(SrcReg, /*TRI=*/nullptr))  in LowerPHINode()
643             if (KillInst->readsRegister(SrcReg, /*TRI=*/nullptr))  in LowerPHINode()
651       assert(KillInst->readsRegister(SrcReg, /*TRI=*/nullptr) &&  in LowerPHINode()
655       LV->addVirtualRegisterKilled(SrcReg, *KillInst);  in LowerPHINode()
659       LV->getVarInfo(SrcReg).AliveBlocks.reset(opBlockNum);  in LowerPHINode()
669           !VRegPHIUseCount[BBVRegPair(opBlock.getNumber(), SrcReg)]) {  in LowerPHINode()
670         LiveInterval &SrcLI = LIS->getInterval(SrcReg);  in LowerPHINode()
688             if (Term->readsRegister(SrcReg, /*TRI=*/nullptr))  in LowerPHINode()
702                 if (KillInst->readsRegister(SrcReg, /*TRI=*/nullptr))  in LowerPHINode()
710           assert(KillInst->readsRegister(SrcReg, /*TRI=*/nullptr) &&  in LowerPHINode()